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0001 /*
0002  * C293 Silicon/SoC Device Tree Source (post include)
0003  *
0004  * Copyright 2012 Freescale Semiconductor Inc.
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions are met:
0008  *     * Redistributions of source code must retain the above copyright
0009  *       notice, this list of conditions and the following disclaimer.
0010  *     * Redistributions in binary form must reproduce the above copyright
0011  *       notice, this list of conditions and the following disclaimer in the
0012  *       documentation and/or other materials provided with the distribution.
0013  *     * Neither the name of Freescale Semiconductor nor the
0014  *       names of its contributors may be used to endorse or promote products
0015  *       derived from this software without specific prior written permission.
0016  *
0017  *
0018  * ALTERNATIVELY, this software may be distributed under the terms of the
0019  * GNU General Public License ("GPL") as published by the Free Software
0020  * Foundation, either version 2 of that License or (at your option) any
0021  * later version.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033  */
0034 
0035 &ifc {
0036         #address-cells = <2>;
0037         #size-cells = <1>;
0038         compatible = "fsl,ifc", "simple-bus";
0039         interrupts = <19 2 0 0>;
0040 };
0041 
0042 /* controller at 0xa000 */
0043 &pci0 {
0044         compatible = "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
0045         device_type = "pci";
0046         #size-cells = <2>;
0047         #address-cells = <3>;
0048         bus-range = <0 255>;
0049         clock-frequency = <33333333>;
0050         interrupts = <16 2 0 0>;
0051 
0052         pcie@0 {
0053                 reg = <0 0 0 0 0>;
0054                 #interrupt-cells = <1>;
0055                 #size-cells = <2>;
0056                 #address-cells = <3>;
0057                 device_type = "pci";
0058                 interrupts = <16 2 0 0>;
0059                 interrupt-map-mask = <0xf800 0 0 7>;
0060                 interrupt-map = <
0061                         /* IDSEL 0x0 */
0062                         0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
0063                         0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
0064                         0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
0065                         0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
0066                         >;
0067         };
0068 };
0069 
0070 &soc {
0071         #address-cells = <1>;
0072         #size-cells = <1>;
0073         device_type = "soc";
0074         compatible = "simple-bus";
0075         bus-frequency = <0>;            // Filled out by uboot.
0076 
0077         ecm-law@0 {
0078                 compatible = "fsl,ecm-law";
0079                 reg = <0x0 0x1000>;
0080                 fsl,num-laws = <12>;
0081         };
0082 
0083         ecm@1000 {
0084                 compatible = "fsl,c293-ecm", "fsl,ecm";
0085                 reg = <0x1000 0x1000>;
0086                 interrupts = <16 2 0 0>;
0087         };
0088 
0089         memory-controller@2000 {
0090                 compatible = "fsl,c293-memory-controller";
0091                 reg = <0x2000 0x1000>;
0092                 interrupts = <16 2 0 0>;
0093         };
0094 
0095 /include/ "pq3-i2c-0.dtsi"
0096 /include/ "pq3-i2c-1.dtsi"
0097 /include/ "pq3-duart-0.dtsi"
0098 /include/ "pq3-espi-0.dtsi"
0099         spi0: spi@7000 {
0100                 fsl,espi-num-chipselects = <1>;
0101         };
0102 
0103 /include/ "pq3-gpio-0.dtsi"
0104         L2: l2-cache-controller@20000 {
0105                 compatible = "fsl,c293-l2-cache-controller";
0106                 reg = <0x20000 0x1000>;
0107                 cache-line-size = <32>; // 32 bytes
0108                 cache-size = <0x80000>; // L2,512K
0109                 interrupts = <16 2 0 0>;
0110         };
0111 
0112 /include/ "pq3-dma-0.dtsi"
0113 /include/ "pq3-esdhc-0.dtsi"
0114         sdhc@2e000 {
0115                 compatible = "fsl,c293-esdhc", "fsl,esdhc";
0116                 sdhci,auto-cmd12;
0117         };
0118 
0119         crypto@80000 {
0120 /include/ "qoriq-sec6.0-0.dtsi"
0121         };
0122 
0123         crypto@80000 {
0124                 reg = <0x80000 0x20000>;
0125                 ranges = <0x0 0x80000 0x20000>;
0126 
0127                 jr@1000{
0128                         interrupts = <45 2 0 0>;
0129                 };
0130                 jr@2000{
0131                         interrupts = <57 2 0 0>;
0132                 };
0133         };
0134 
0135         crypto@a0000 {
0136 /include/ "qoriq-sec6.0-0.dtsi"
0137         };
0138 
0139         crypto@a0000 {
0140                 reg = <0xa0000 0x20000>;
0141                 ranges = <0x0 0xa0000 0x20000>;
0142 
0143                 jr@1000{
0144                         interrupts = <49 2 0 0>;
0145                 };
0146                 jr@2000{
0147                         interrupts = <50 2 0 0>;
0148                 };
0149         };
0150 
0151         crypto@c0000 {
0152 /include/ "qoriq-sec6.0-0.dtsi"
0153         };
0154 
0155         crypto@c0000 {
0156                 reg = <0xc0000 0x20000>;
0157                 ranges = <0x0 0xc0000 0x20000>;
0158 
0159                 jr@1000{
0160                         interrupts = <55 2 0 0>;
0161                 };
0162                 jr@2000{
0163                         interrupts = <56 2 0 0>;
0164                 };
0165         };
0166 
0167 /include/ "pq3-mpic.dtsi"
0168 /include/ "pq3-mpic-timer-B.dtsi"
0169 
0170 /include/ "pq3-etsec2-0.dtsi"
0171         enet0: ethernet@b0000 {
0172                 queue-group@b0000 {
0173                         reg = <0x10000 0x1000>;
0174                 };
0175         };
0176 
0177 /include/ "pq3-etsec2-1.dtsi"
0178         enet1: ethernet@b1000 {
0179                 queue-group@b1000 {
0180                         reg = <0x11000 0x1000>;
0181                 };
0182         };
0183 
0184         global-utilities@e0000 {
0185                 compatible = "fsl,c293-guts";
0186                 reg = <0xe0000 0x1000>;
0187                 fsl,has-rstcr;
0188         };
0189 };