0001 /*
0002 * B4420DS Device Tree Source
0003 *
0004 * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * This software is provided by Freescale Semiconductor "as is" and any
0024 * express or implied warranties, including, but not limited to, the implied
0025 * warranties of merchantability and fitness for a particular purpose are
0026 * disclaimed. In no event shall Freescale Semiconductor be liable for any
0027 * direct, indirect, incidental, special, exemplary, or consequential damages
0028 * (including, but not limited to, procurement of substitute goods or services;
0029 * loss of use, data, or profits; or business interruption) however caused and
0030 * on any theory of liability, whether in contract, strict liability, or tort
0031 * (including negligence or otherwise) arising in any way out of the use of
0032 * this software, even if advised of the possibility of such damage.
0033 */
0034
0035 / {
0036 model = "fsl,B4QDS";
0037 compatible = "fsl,B4QDS";
0038 #address-cells = <2>;
0039 #size-cells = <2>;
0040 interrupt-parent = <&mpic>;
0041
0042 aliases {
0043 crypto = &crypto;
0044 phy_sgmii_10 = &phy_sgmii_10;
0045 phy_sgmii_11 = &phy_sgmii_11;
0046 phy_sgmii_1c = &phy_sgmii_1c;
0047 phy_sgmii_1d = &phy_sgmii_1d;
0048 };
0049
0050 ifc: localbus@ffe124000 {
0051 reg = <0xf 0xfe124000 0 0x2000>;
0052 ranges = <0 0 0xf 0xe8000000 0x08000000
0053 2 0 0xf 0xff800000 0x00010000
0054 3 0 0xf 0xffdf0000 0x00008000>;
0055
0056 nor@0,0 {
0057 #address-cells = <1>;
0058 #size-cells = <1>;
0059 compatible = "cfi-flash";
0060 reg = <0x0 0x0 0x8000000>;
0061 bank-width = <2>;
0062 device-width = <1>;
0063 };
0064
0065 nand@2,0 {
0066 #address-cells = <1>;
0067 #size-cells = <1>;
0068 compatible = "fsl,ifc-nand";
0069 reg = <0x2 0x0 0x10000>;
0070
0071 partition@0 {
0072 /* This location must not be altered */
0073 /* 1MB for u-boot Bootloader Image */
0074 reg = <0x0 0x00100000>;
0075 label = "NAND U-Boot Image";
0076 read-only;
0077 };
0078
0079 partition@100000 {
0080 /* 1MB for DTB Image */
0081 reg = <0x00100000 0x00100000>;
0082 label = "NAND DTB Image";
0083 };
0084
0085 partition@200000 {
0086 /* 10MB for Linux Kernel Image */
0087 reg = <0x00200000 0x00A00000>;
0088 label = "NAND Linux Kernel Image";
0089 };
0090
0091 partition@c00000 {
0092 /* 500MB for Root file System Image */
0093 reg = <0x00c00000 0x1F400000>;
0094 label = "NAND RFS Image";
0095 };
0096 };
0097
0098 board-control@3,0 {
0099 compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis";
0100 reg = <3 0 0x300>;
0101 };
0102 };
0103
0104 memory {
0105 device_type = "memory";
0106 };
0107
0108 reserved-memory {
0109 #address-cells = <2>;
0110 #size-cells = <2>;
0111 ranges;
0112
0113 bman_fbpr: bman-fbpr {
0114 size = <0 0x1000000>;
0115 alignment = <0 0x1000000>;
0116 };
0117 qman_fqd: qman-fqd {
0118 size = <0 0x400000>;
0119 alignment = <0 0x400000>;
0120 };
0121 qman_pfdr: qman-pfdr {
0122 size = <0 0x2000000>;
0123 alignment = <0 0x2000000>;
0124 };
0125 };
0126
0127 dcsr: dcsr@f00000000 {
0128 ranges = <0x00000000 0xf 0x00000000 0x01052000>;
0129 };
0130
0131 bportals: bman-portals@ff4000000 {
0132 ranges = <0x0 0xf 0xf4000000 0x2000000>;
0133 };
0134
0135 qportals: qman-portals@ff6000000 {
0136 ranges = <0x0 0xf 0xf6000000 0x2000000>;
0137 };
0138
0139 soc: soc@ffe000000 {
0140 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
0141 reg = <0xf 0xfe000000 0 0x00001000>;
0142 spi@110000 {
0143 flash@0 {
0144 #address-cells = <1>;
0145 #size-cells = <1>;
0146 compatible = "sst,sst25wf040", "jedec,spi-nor";
0147 reg = <0>;
0148 spi-max-frequency = <40000000>; /* input clock */
0149 };
0150 };
0151
0152 sdhc@114000 {
0153 /*Disabled as there is no sdhc connector on B4420QDS board*/
0154 status = "disabled";
0155 };
0156
0157 i2c@118000 {
0158 mux@77 {
0159 compatible = "nxp,pca9547";
0160 reg = <0x77>;
0161 #address-cells = <1>;
0162 #size-cells = <0>;
0163
0164 i2c@0 {
0165 #address-cells = <1>;
0166 #size-cells = <0>;
0167 reg = <0>;
0168
0169 eeprom@50 {
0170 compatible = "atmel,24c64";
0171 reg = <0x50>;
0172 };
0173 eeprom@51 {
0174 compatible = "atmel,24c256";
0175 reg = <0x51>;
0176 };
0177 eeprom@53 {
0178 compatible = "atmel,24c256";
0179 reg = <0x53>;
0180 };
0181 eeprom@57 {
0182 compatible = "atmel,24c256";
0183 reg = <0x57>;
0184 };
0185 rtc@68 {
0186 compatible = "dallas,ds3232";
0187 reg = <0x68>;
0188 };
0189 };
0190
0191 i2c@2 {
0192 #address-cells = <1>;
0193 #size-cells = <0>;
0194 reg = <0x2>;
0195
0196 ina220@40 {
0197 compatible = "ti,ina220";
0198 reg = <0x40>;
0199 shunt-resistor = <1000>;
0200 };
0201 };
0202
0203 i2c@3 {
0204 #address-cells = <1>;
0205 #size-cells = <0>;
0206 reg = <0x3>;
0207
0208 adt7461@4c {
0209 compatible = "adi,adt7461";
0210 reg = <0x4c>;
0211 };
0212 };
0213 };
0214 };
0215
0216 usb@210000 {
0217 dr_mode = "host";
0218 phy_type = "ulpi";
0219 };
0220
0221 fman@400000 {
0222 ethernet@e0000 {
0223 phy-handle = <&phy_sgmii_10>;
0224 phy-connection-type = "sgmii";
0225 };
0226
0227 ethernet@e2000 {
0228 phy-handle = <&phy_sgmii_11>;
0229 phy-connection-type = "sgmii";
0230 };
0231
0232 ethernet@e4000 {
0233 phy-handle = <&phy_sgmii_1c>;
0234 phy-connection-type = "sgmii";
0235 };
0236
0237 ethernet@e6000 {
0238 phy-handle = <&phy_sgmii_1d>;
0239 phy-connection-type = "sgmii";
0240 };
0241
0242 mdio@fc000 {
0243 phy_sgmii_10: ethernet-phy@10 {
0244 reg = <0x10>;
0245 };
0246
0247 phy_sgmii_11: ethernet-phy@11 {
0248 reg = <0x11>;
0249 };
0250
0251 phy_sgmii_1c: ethernet-phy@1c {
0252 reg = <0x1c>;
0253 status = "disabled";
0254 };
0255
0256 phy_sgmii_1d: ethernet-phy@1d {
0257 reg = <0x1d>;
0258 status = "disabled";
0259 };
0260 };
0261 };
0262 };
0263
0264 pci0: pcie@ffe200000 {
0265 reg = <0xf 0xfe200000 0 0x10000>;
0266 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
0267 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
0268 pcie@0 {
0269 ranges = <0x02000000 0 0xe0000000
0270 0x02000000 0 0xe0000000
0271 0 0x20000000
0272
0273 0x01000000 0 0x00000000
0274 0x01000000 0 0x00000000
0275 0 0x00010000>;
0276 };
0277 };
0278 };
0279
0280 /include/ "b4si-post.dtsi"
