0001 /*
0002 * B4860 Silicon/SoC Device Tree Source (pre include)
0003 *
0004 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 /dts-v1/;
0036
0037 /include/ "e6500_power_isa.dtsi"
0038
0039 / {
0040 compatible = "fsl,B4860";
0041 #address-cells = <2>;
0042 #size-cells = <2>;
0043 interrupt-parent = <&mpic>;
0044
0045 aliases {
0046 ccsr = &soc;
0047 dcsr = &dcsr;
0048
0049 serial0 = &serial0;
0050 serial1 = &serial1;
0051 serial2 = &serial2;
0052 serial3 = &serial3;
0053 pci0 = &pci0;
0054 usb0 = &usb0;
0055 dma0 = &dma0;
0056 dma1 = &dma1;
0057 sdhc = &sdhc;
0058
0059 fman0 = &fman0;
0060 ethernet0 = &enet0;
0061 ethernet1 = &enet1;
0062 ethernet2 = &enet2;
0063 ethernet3 = &enet3;
0064 ethernet4 = &enet4;
0065 ethernet5 = &enet5;
0066 ethernet6 = &enet6;
0067 ethernet7 = &enet7;
0068 };
0069
0070
0071 cpus {
0072 #address-cells = <1>;
0073 #size-cells = <0>;
0074
0075 cpu0: PowerPC,e6500@0 {
0076 device_type = "cpu";
0077 reg = <0 1>;
0078 clocks = <&clockgen 1 0>;
0079 next-level-cache = <&L2_1>;
0080 fsl,portid-mapping = <0x80000000>;
0081 };
0082 cpu1: PowerPC,e6500@2 {
0083 device_type = "cpu";
0084 reg = <2 3>;
0085 clocks = <&clockgen 1 0>;
0086 next-level-cache = <&L2_1>;
0087 fsl,portid-mapping = <0x80000000>;
0088 };
0089 cpu2: PowerPC,e6500@4 {
0090 device_type = "cpu";
0091 reg = <4 5>;
0092 clocks = <&clockgen 1 0>;
0093 next-level-cache = <&L2_1>;
0094 fsl,portid-mapping = <0x80000000>;
0095 };
0096 cpu3: PowerPC,e6500@6 {
0097 device_type = "cpu";
0098 reg = <6 7>;
0099 clocks = <&clockgen 1 0>;
0100 next-level-cache = <&L2_1>;
0101 fsl,portid-mapping = <0x80000000>;
0102 };
0103 };
0104 };
