0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Device Tree Source for the MPC5121e based ac14xx board
0004 *
0005 * Copyright 2012 Anatolij Gustschin <agust@denx.de>
0006 */
0007
0008
0009 #include "mpc5121.dtsi"
0010
0011 / {
0012 model = "ac14xx";
0013 compatible = "ifm,ac14xx", "fsl,mpc5121";
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016
0017 aliases {
0018 serial0 = &serial0;
0019 serial1 = &serial7;
0020 spi4 = &spi4;
0021 spi5 = &spi5;
0022 };
0023
0024 cpus {
0025 PowerPC,5121@0 {
0026 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
0027 bus-frequency = <160000000>; /* 160 MHz csb bus */
0028 clock-frequency = <400000000>; /* 400 MHz ppc core */
0029 };
0030 };
0031
0032 memory {
0033 reg = <0x00000000 0x10000000>; /* 256MB at 0 */
0034 };
0035
0036 nfc@40000000 {
0037 status = "disabled";
0038 };
0039
0040 localbus@80000020 {
0041 ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
0042 0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
0043 0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
0044 0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
0045 0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
0046 0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
0047
0048 flash@0,0 {
0049 compatible = "cfi-flash";
0050 reg = <0 0x00000000 0x04000000>;
0051 #address-cells = <1>;
0052 #size-cells = <1>;
0053 bank-width = <2>;
0054 device-width = <2>;
0055
0056 partition@0 {
0057 label = "dtb-kernel-production";
0058 reg = <0x00000000 0x00400000>;
0059 };
0060 partition@1 {
0061 label = "filesystem-production";
0062 reg = <0x00400000 0x03400000>;
0063 };
0064
0065 partition@2 {
0066 label = "recovery";
0067 reg = <0x03800000 0x00700000>;
0068 };
0069
0070 partition@3 {
0071 label = "uboot-code";
0072 reg = <0x03f00000 0x00040000>;
0073 };
0074 partition@4 {
0075 label = "uboot-env1";
0076 reg = <0x03f40000 0x00020000>;
0077 };
0078 partition@5 {
0079 label = "uboot-env2";
0080 reg = <0x03f60000 0x00020000>;
0081 };
0082 };
0083
0084 fram@1,0 {
0085 compatible = "ifm,ac14xx-fram", "linux,uio-pdrv-genirq";
0086 reg = <1 0x00000000 0x00010000>;
0087 };
0088
0089 asi@2,0 {
0090 /* masters mapping: CS, CS offset, size */
0091 reg = <2 0x00000000 0x00080000
0092 6 0x00000000 0x00080000>;
0093 #address-cells = <1>;
0094 #size-cells = <1>;
0095 compatible = "ifm,ac14xx-asi-fpga";
0096 gpios = <
0097 &gpio_pic 26 0 /* prog */
0098 &gpio_pic 27 0 /* done */
0099 &gpio_pic 10 0 /* reset */
0100 >;
0101
0102 master@1 {
0103 interrupts = <20 0x2>;
0104 interrupt-parent = <&gpio_pic>;
0105 chipselect = <2 0x00009000 0x00009100>;
0106 label = "AS-i master 1";
0107 };
0108
0109 master@2 {
0110 interrupts = <21 0x2>;
0111 interrupt-parent = <&gpio_pic>;
0112 chipselect = <6 0x00009000 0x00009100>;
0113 label = "AS-i master 2";
0114 };
0115 };
0116
0117 netx@3,0 {
0118 compatible = "ifm,netx";
0119 reg = <0x3 0x00000000 0x00020000>;
0120 chipselect = <3 0x00101140 0x00203100>;
0121 interrupts = <17 0x8>;
0122 gpios = <&gpio_pic 15 0>;
0123 };
0124
0125 safety@5,0 {
0126 compatible = "ifm,safety";
0127 reg = <0x5 0x00000000 0x00010000>;
0128 chipselect = <5 0x00009000 0x00009100>;
0129 interrupts = <22 0x2>;
0130 interrupt-parent = <&gpio_pic>;
0131 gpios = <
0132 &gpio_pic 12 0 /* prog */
0133 &gpio_pic 11 0 /* done */
0134 >;
0135 };
0136 };
0137
0138 clocks {
0139 osc {
0140 clock-frequency = <25000000>;
0141 };
0142 };
0143
0144 soc@80000000 {
0145 bus-frequency = <80000000>; /* 80 MHz ips bus */
0146
0147 clock@f00 {
0148 compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
0149 };
0150
0151 /*
0152 * GPIO PIC:
0153 * interrupts cell = <pin nr, sense>
0154 * sense == 8: Level, low assertion
0155 * sense == 2: Edge, high-to-low change
0156 */
0157 gpio_pic: gpio@1100 {
0158 gpio-controller;
0159 #gpio-cells = <2>;
0160 interrupt-controller;
0161 #interrupt-cells = <2>;
0162 };
0163
0164 sdhc@1500 {
0165 cd-gpios = <&gpio_pic 23 0>; /* card detect */
0166 wp-gpios = <&gpio_pic 24 0>; /* write protect */
0167 wp-inverted; /* WP active high */
0168 };
0169
0170 i2c@1700 {
0171 /* use Fast-mode */
0172 clock-frequency = <400000>;
0173
0174 at24@30 {
0175 compatible = "atmel,24c01";
0176 reg = <0x30>;
0177 };
0178
0179 at24@31 {
0180 compatible = "atmel,24c01";
0181 reg = <0x31>;
0182 };
0183
0184 temp@48 {
0185 compatible = "ad,ad7414";
0186 reg = <0x48>;
0187 };
0188
0189 at24@50 {
0190 compatible = "atmel,24c01";
0191 reg = <0x50>;
0192 };
0193
0194 at24@51 {
0195 compatible = "atmel,24c01";
0196 reg = <0x51>;
0197 };
0198
0199 at24@52 {
0200 compatible = "atmel,24c01";
0201 reg = <0x52>;
0202 };
0203
0204 at24@53 {
0205 compatible = "atmel,24c01";
0206 reg = <0x53>;
0207 };
0208
0209 at24@54 {
0210 compatible = "atmel,24c01";
0211 reg = <0x54>;
0212 };
0213
0214 at24@55 {
0215 compatible = "atmel,24c01";
0216 reg = <0x55>;
0217 };
0218
0219 at24@56 {
0220 compatible = "atmel,24c01";
0221 reg = <0x56>;
0222 };
0223
0224 at24@57 {
0225 compatible = "atmel,24c01";
0226 reg = <0x57>;
0227 };
0228
0229 rtc@68 {
0230 compatible = "st,m41t00";
0231 reg = <0x68>;
0232 };
0233 };
0234
0235 axe_pic: axe-base@2000 {
0236 compatible = "fsl,mpc5121-axe-base";
0237 reg = <0x2000 0x100>;
0238 interrupts = <42 0x8>;
0239 interrupt-controller;
0240 #interrupt-cells = <2>;
0241 };
0242
0243 axe-app {
0244 compatible = "fsl,mpc5121-axe-app";
0245 interrupt-parent = <&axe_pic>;
0246 interrupts = <
0247 /* soft interrupts */
0248 0 0x0 1 0x0 2 0x0 3 0x0
0249 4 0x0 5 0x0 6 0x0 7 0x0
0250 /* fifo interrupts */
0251 8 0x0 9 0x0 10 0x0 11 0x0
0252 >;
0253 };
0254
0255 display@2100 {
0256 edid = [00 FF FF FF FF FF FF 00 14 94 00 00 00 00 00 00
0257 0A 12 01 03 80 1C 23 78 CA 88 FF 94 52 54 8E 27
0258 1E 4C 50 00 00 00 01 01 01 01 01 01 01 01 01 01
0259 01 01 01 01 01 01 FB 00 B0 14 00 DC 05 00 08 04
0260 21 00 1C 23 00 00 00 18 00 00 00 FD 00 38 3C 1F
0261 3C 01 0A 20 20 20 20 20 20 20 00 00 00 FC 00 45
0262 54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
0263 00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
0264 };
0265
0266 can@2300 {
0267 status = "disabled";
0268 };
0269
0270 can@2380 {
0271 status = "disabled";
0272 };
0273
0274 viu@2400 {
0275 status = "disabled";
0276 };
0277
0278 mdio@2800 {
0279 phy0: ethernet-phy@1f {
0280 compatible = "smsc,lan8700";
0281 reg = <0x1f>;
0282 };
0283 };
0284
0285 enet: ethernet@2800 {
0286 phy-handle = <&phy0>;
0287 };
0288
0289 usb@3000 {
0290 status = "disabled";
0291 };
0292
0293 usb@4000 {
0294 status = "disabled";
0295 };
0296
0297 /* PSC3 serial port A, aka ttyPSC0 */
0298 serial0: psc@11300 {
0299 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
0300 fsl,rx-fifo-size = <512>;
0301 fsl,tx-fifo-size = <512>;
0302 };
0303
0304 /* PSC4 in SPI mode */
0305 spi4: psc@11400 {
0306 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
0307 fsl,rx-fifo-size = <768>;
0308 fsl,tx-fifo-size = <768>;
0309 #address-cells = <1>;
0310 #size-cells = <0>;
0311 num-cs = <1>;
0312 cs-gpios = <&gpio_pic 25 0>;
0313
0314 flash: m25p128@0 {
0315 compatible = "st,m25p128";
0316 spi-max-frequency = <20000000>;
0317 reg = <0>;
0318 #address-cells = <1>;
0319 #size-cells = <1>;
0320
0321 partition@0 {
0322 label = "spi-flash0";
0323 reg = <0x00000000 0x01000000>;
0324 };
0325 };
0326 };
0327
0328 /* PSC5 in SPI mode */
0329 spi5: psc@11500 {
0330 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
0331 fsl,mode = "spi-master";
0332 fsl,rx-fifo-size = <128>;
0333 fsl,tx-fifo-size = <128>;
0334 #address-cells = <1>;
0335 #size-cells = <0>;
0336
0337 lcd@0 {
0338 compatible = "ilitek,ili922x";
0339 reg = <0>;
0340 spi-max-frequency = <100000>;
0341 spi-cpol;
0342 spi-cpha;
0343 };
0344 };
0345
0346 /* PSC7 serial port C, aka ttyPSC2 */
0347 serial7: psc@11700 {
0348 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
0349 fsl,rx-fifo-size = <512>;
0350 fsl,tx-fifo-size = <512>;
0351 };
0352
0353 matrix_keypad@0 {
0354 compatible = "gpio-matrix-keypad";
0355 debounce-delay-ms = <5>;
0356 col-scan-delay-us = <1>;
0357 gpio-activelow;
0358 col-gpios-binary;
0359 col-switch-delay-ms = <200>;
0360
0361 col-gpios = <&gpio_pic 1 0>; /* pin1 */
0362
0363 row-gpios = <&gpio_pic 2 0 /* pin2 */
0364 &gpio_pic 3 0 /* pin3 */
0365 &gpio_pic 4 0>; /* pin4 */
0366
0367 linux,keymap = <0x0000006e /* FN LEFT */
0368 0x01000067 /* UP */
0369 0x02000066 /* FN RIGHT */
0370 0x00010069 /* LEFT */
0371 0x0101006a /* DOWN */
0372 0x0201006c>; /* RIGHT */
0373 };
0374 };
0375
0376 leds {
0377 compatible = "gpio-leds";
0378
0379 backlight {
0380 label = "backlight";
0381 gpios = <&gpio_pic 0 0>;
0382 default-state = "keep";
0383 };
0384 green {
0385 label = "green";
0386 gpios = <&gpio_pic 18 0>;
0387 default-state = "keep";
0388 };
0389 red {
0390 label = "red";
0391 gpios = <&gpio_pic 19 0>;
0392 default-state = "keep";
0393 };
0394 };
0395 };
