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0012 #include <linux/init.h>
0013 #include <linux/kernel.h>
0014 #include <linux/types.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/string.h>
0017 #include <linux/export.h>
0018 #include <linux/clk-provider.h>
0019 #include <linux/clkdev.h>
0020 #include <linux/err.h>
0021 #include <linux/gpio/driver.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/platform_data/txx9/ndfmc.h>
0024 #include <linux/serial_core.h>
0025 #include <linux/mtd/physmap.h>
0026 #include <linux/leds.h>
0027 #include <linux/device.h>
0028 #include <linux/slab.h>
0029 #include <linux/io.h>
0030 #include <linux/irq.h>
0031 #include <asm/bootinfo.h>
0032 #include <asm/idle.h>
0033 #include <asm/time.h>
0034 #include <asm/reboot.h>
0035 #include <asm/r4kcache.h>
0036 #include <asm/setup.h>
0037 #include <asm/txx9/generic.h>
0038 #include <asm/txx9/pci.h>
0039 #include <asm/txx9tmr.h>
0040 #include <asm/txx9/dmac.h>
0041 #ifdef CONFIG_CPU_TX49XX
0042 #include <asm/txx9/tx4938.h>
0043 #endif
0044
0045
0046 struct resource txx9_ce_res[8];
0047 static char txx9_ce_res_name[8][4];
0048
0049
0050 unsigned int txx9_pcode;
0051 char txx9_pcode_str[8];
0052 static struct resource txx9_reg_res = {
0053 .name = txx9_pcode_str,
0054 .flags = IORESOURCE_MEM,
0055 };
0056 void __init
0057 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
0058 {
0059 int i;
0060
0061 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
0062 sprintf(txx9_ce_res_name[i], "CE%d", i);
0063 txx9_ce_res[i].flags = IORESOURCE_MEM;
0064 txx9_ce_res[i].name = txx9_ce_res_name[i];
0065 }
0066
0067 txx9_pcode = pcode;
0068 sprintf(txx9_pcode_str, "TX%x", pcode);
0069 if (base) {
0070 txx9_reg_res.start = base & 0xfffffffffULL;
0071 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
0072 request_resource(&iomem_resource, &txx9_reg_res);
0073 }
0074 }
0075
0076
0077 unsigned int txx9_master_clock;
0078 unsigned int txx9_cpu_clock;
0079 unsigned int txx9_gbus_clock;
0080
0081 int txx9_ccfg_toeon __initdata = 1;
0082
0083 #define BOARD_VEC(board) extern struct txx9_board_vec board;
0084 #include <asm/txx9/boards.h>
0085 #undef BOARD_VEC
0086
0087 struct txx9_board_vec *txx9_board_vec __initdata;
0088 static char txx9_system_type[32];
0089
0090 static struct txx9_board_vec *board_vecs[] __initdata = {
0091 #define BOARD_VEC(board) &board,
0092 #include <asm/txx9/boards.h>
0093 #undef BOARD_VEC
0094 };
0095
0096 static struct txx9_board_vec *__init find_board_byname(const char *name)
0097 {
0098 int i;
0099
0100
0101 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
0102 if (strstr(board_vecs[i]->system, name))
0103 return board_vecs[i];
0104 }
0105 return NULL;
0106 }
0107
0108 static void __init prom_init_cmdline(void)
0109 {
0110 int argc;
0111 int *argv32;
0112 int i;
0113
0114 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
0115
0116
0117
0118
0119 argc = 0;
0120 argv32 = NULL;
0121 } else {
0122 argc = (int)fw_arg0;
0123 argv32 = (int *)fw_arg1;
0124 }
0125
0126 arcs_cmdline[0] = '\0';
0127
0128 for (i = 1; i < argc; i++) {
0129 char *str = (char *)(long)argv32[i];
0130 if (i != 1)
0131 strcat(arcs_cmdline, " ");
0132 if (strchr(str, ' ')) {
0133 strcat(arcs_cmdline, "\"");
0134 strcat(arcs_cmdline, str);
0135 strcat(arcs_cmdline, "\"");
0136 } else
0137 strcat(arcs_cmdline, str);
0138 }
0139 }
0140
0141 static int txx9_ic_disable __initdata;
0142 static int txx9_dc_disable __initdata;
0143
0144 #if defined(CONFIG_CPU_TX49XX)
0145
0146 static void __init early_flush_dcache(void)
0147 {
0148 unsigned int conf = read_c0_config();
0149 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
0150 unsigned int linesz = 32;
0151 unsigned long addr, end;
0152
0153 end = INDEX_BASE + dc_size / 4;
0154
0155 for (addr = INDEX_BASE; addr < end; addr += linesz) {
0156 cache_op(Index_Writeback_Inv_D, addr | 0);
0157 cache_op(Index_Writeback_Inv_D, addr | 1);
0158 cache_op(Index_Writeback_Inv_D, addr | 2);
0159 cache_op(Index_Writeback_Inv_D, addr | 3);
0160 }
0161 }
0162
0163 static void __init txx9_cache_fixup(void)
0164 {
0165 unsigned int conf;
0166
0167 conf = read_c0_config();
0168
0169 if (txx9_ic_disable) {
0170 conf |= TX49_CONF_IC;
0171 write_c0_config(conf);
0172 }
0173 if (txx9_dc_disable) {
0174 early_flush_dcache();
0175 conf |= TX49_CONF_DC;
0176 write_c0_config(conf);
0177 }
0178
0179
0180 conf = read_c0_config();
0181 if (!txx9_ic_disable)
0182 conf &= ~TX49_CONF_IC;
0183 if (!txx9_dc_disable)
0184 conf &= ~TX49_CONF_DC;
0185 write_c0_config(conf);
0186
0187 if (conf & TX49_CONF_IC)
0188 pr_info("TX49XX I-Cache disabled.\n");
0189 if (conf & TX49_CONF_DC)
0190 pr_info("TX49XX D-Cache disabled.\n");
0191 }
0192 #else
0193 static inline void txx9_cache_fixup(void)
0194 {
0195 }
0196 #endif
0197
0198 static void __init preprocess_cmdline(void)
0199 {
0200 static char cmdline[COMMAND_LINE_SIZE] __initdata;
0201 char *s;
0202
0203 strcpy(cmdline, arcs_cmdline);
0204 s = cmdline;
0205 arcs_cmdline[0] = '\0';
0206 while (s && *s) {
0207 char *str = strsep(&s, " ");
0208 if (strncmp(str, "board=", 6) == 0) {
0209 txx9_board_vec = find_board_byname(str + 6);
0210 continue;
0211 } else if (strncmp(str, "masterclk=", 10) == 0) {
0212 unsigned int val;
0213 if (kstrtouint(str + 10, 10, &val) == 0)
0214 txx9_master_clock = val;
0215 continue;
0216 } else if (strcmp(str, "icdisable") == 0) {
0217 txx9_ic_disable = 1;
0218 continue;
0219 } else if (strcmp(str, "dcdisable") == 0) {
0220 txx9_dc_disable = 1;
0221 continue;
0222 } else if (strcmp(str, "toeoff") == 0) {
0223 txx9_ccfg_toeon = 0;
0224 continue;
0225 } else if (strcmp(str, "toeon") == 0) {
0226 txx9_ccfg_toeon = 1;
0227 continue;
0228 }
0229 if (arcs_cmdline[0])
0230 strcat(arcs_cmdline, " ");
0231 strcat(arcs_cmdline, str);
0232 }
0233
0234 txx9_cache_fixup();
0235 }
0236
0237 static void __init select_board(void)
0238 {
0239 const char *envstr;
0240
0241
0242 if (txx9_board_vec)
0243 return;
0244
0245 envstr = prom_getenv("board");
0246 if (envstr) {
0247 txx9_board_vec = find_board_byname(envstr);
0248 if (txx9_board_vec)
0249 return;
0250 }
0251
0252
0253 #ifdef CONFIG_CPU_TX49XX
0254 switch (TX4938_REV_PCODE()) {
0255 #ifdef CONFIG_TOSHIBA_RBTX4927
0256 case 0x4927:
0257 txx9_board_vec = &rbtx4927_vec;
0258 break;
0259 case 0x4937:
0260 txx9_board_vec = &rbtx4937_vec;
0261 break;
0262 #endif
0263 }
0264 #endif
0265 }
0266
0267 void __init prom_init(void)
0268 {
0269 prom_init_cmdline();
0270 preprocess_cmdline();
0271 select_board();
0272
0273 strcpy(txx9_system_type, txx9_board_vec->system);
0274
0275 txx9_board_vec->prom_init();
0276 }
0277
0278 const char *get_system_type(void)
0279 {
0280 return txx9_system_type;
0281 }
0282
0283 const char *__init prom_getenv(const char *name)
0284 {
0285 const s32 *str;
0286
0287 if (fw_arg2 < CKSEG0)
0288 return NULL;
0289
0290 str = (const s32 *)fw_arg2;
0291
0292 while (str[0] && str[1]) {
0293 if (!strcmp((const char *)(unsigned long)str[0], name))
0294 return (const char *)(unsigned long)str[1];
0295 str += 2;
0296 }
0297 return NULL;
0298 }
0299
0300 static void __noreturn txx9_machine_halt(void)
0301 {
0302 local_irq_disable();
0303 clear_c0_status(ST0_IM);
0304 while (1) {
0305 if (cpu_wait) {
0306 (*cpu_wait)();
0307 if (cpu_has_counter) {
0308
0309
0310
0311
0312
0313 write_c0_compare(0);
0314 }
0315 }
0316 }
0317 }
0318
0319
0320 void __init txx9_wdt_init(unsigned long base)
0321 {
0322 struct resource res = {
0323 .start = base,
0324 .end = base + 0x100 - 1,
0325 .flags = IORESOURCE_MEM,
0326 };
0327 platform_device_register_simple("txx9wdt", -1, &res, 1);
0328 }
0329
0330 void txx9_wdt_now(unsigned long base)
0331 {
0332 struct txx9_tmr_reg __iomem *tmrptr =
0333 ioremap(base, sizeof(struct txx9_tmr_reg));
0334
0335 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
0336 __raw_writel(0, &tmrptr->tcr);
0337
0338 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
0339 __raw_writel(1, &tmrptr->cpra);
0340 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
0341 &tmrptr->tcr);
0342 }
0343
0344
0345 void __init txx9_spi_init(int busid, unsigned long base, int irq)
0346 {
0347 struct resource res[] = {
0348 {
0349 .start = base,
0350 .end = base + 0x20 - 1,
0351 .flags = IORESOURCE_MEM,
0352 }, {
0353 .start = irq,
0354 .flags = IORESOURCE_IRQ,
0355 },
0356 };
0357 platform_device_register_simple("spi_txx9", busid,
0358 res, ARRAY_SIZE(res));
0359 }
0360
0361 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
0362 {
0363 struct platform_device *pdev =
0364 platform_device_alloc("tc35815-mac", id);
0365 if (!pdev ||
0366 platform_device_add_data(pdev, ethaddr, 6) ||
0367 platform_device_add(pdev))
0368 platform_device_put(pdev);
0369 }
0370
0371 void __init txx9_sio_init(unsigned long baseaddr, int irq,
0372 unsigned int line, unsigned int sclk, int nocts)
0373 {
0374 #ifdef CONFIG_SERIAL_TXX9
0375 struct uart_port req;
0376
0377 memset(&req, 0, sizeof(req));
0378 req.line = line;
0379 req.iotype = UPIO_MEM;
0380 req.membase = ioremap(baseaddr, 0x24);
0381 req.mapbase = baseaddr;
0382 req.irq = irq;
0383 if (!nocts)
0384 req.flags |= UPF_BUGGY_UART ;
0385 if (sclk) {
0386 req.flags |= UPF_MAGIC_MULTIPLIER ;
0387 req.uartclk = sclk;
0388 } else
0389 req.uartclk = TXX9_IMCLK;
0390 early_serial_txx9_setup(&req);
0391 #endif
0392 }
0393
0394 #ifdef CONFIG_EARLY_PRINTK
0395 static void null_prom_putchar(char c)
0396 {
0397 }
0398 void (*txx9_prom_putchar)(char c) = null_prom_putchar;
0399
0400 void prom_putchar(char c)
0401 {
0402 txx9_prom_putchar(c);
0403 }
0404
0405 static void __iomem *early_txx9_sio_port;
0406
0407 static void early_txx9_sio_putchar(char c)
0408 {
0409 #define TXX9_SICISR 0x0c
0410 #define TXX9_SITFIFO 0x1c
0411 #define TXX9_SICISR_TXALS 0x00000002
0412 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
0413 TXX9_SICISR_TXALS))
0414 ;
0415 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
0416 }
0417
0418 void __init txx9_sio_putchar_init(unsigned long baseaddr)
0419 {
0420 early_txx9_sio_port = ioremap(baseaddr, 0x24);
0421 txx9_prom_putchar = early_txx9_sio_putchar;
0422 }
0423 #endif
0424
0425
0426 void __init plat_mem_setup(void)
0427 {
0428 ioport_resource.start = 0;
0429 ioport_resource.end = ~0UL;
0430 iomem_resource.start = 0;
0431 iomem_resource.end = ~0UL;
0432
0433
0434 _machine_restart = (void (*)(char *))txx9_machine_halt;
0435 _machine_halt = txx9_machine_halt;
0436 pm_power_off = txx9_machine_halt;
0437
0438 #ifdef CONFIG_PCI
0439 pcibios_plat_setup = txx9_pcibios_setup;
0440 #endif
0441 txx9_board_vec->mem_setup();
0442 }
0443
0444 void __init arch_init_irq(void)
0445 {
0446 txx9_board_vec->irq_setup();
0447 }
0448
0449 void __init plat_time_init(void)
0450 {
0451 #ifdef CONFIG_CPU_TX49XX
0452 mips_hpt_frequency = txx9_cpu_clock / 2;
0453 #endif
0454 txx9_board_vec->time_init();
0455 }
0456
0457 static void txx9_clk_init(void)
0458 {
0459 struct clk_hw *hw;
0460 int error;
0461
0462 hw = clk_hw_register_fixed_rate(NULL, "gbus", NULL, 0, txx9_gbus_clock);
0463 if (IS_ERR(hw)) {
0464 error = PTR_ERR(hw);
0465 goto fail;
0466 }
0467
0468 hw = clk_hw_register_fixed_factor(NULL, "imbus", "gbus", 0, 1, 2);
0469 error = clk_hw_register_clkdev(hw, "imbus_clk", NULL);
0470 if (error)
0471 goto fail;
0472
0473 #ifdef CONFIG_CPU_TX49XX
0474 if (TX4938_REV_PCODE() == 0x4938) {
0475 hw = clk_hw_register_fixed_factor(NULL, "spi", "gbus", 0, 1, 4);
0476 error = clk_hw_register_clkdev(hw, "spi-baseclk", NULL);
0477 if (error)
0478 goto fail;
0479 }
0480 #endif
0481
0482 return;
0483
0484 fail:
0485 pr_err("Failed to register clocks: %d\n", error);
0486 }
0487
0488 static int __init _txx9_arch_init(void)
0489 {
0490 txx9_clk_init();
0491
0492 if (txx9_board_vec->arch_init)
0493 txx9_board_vec->arch_init();
0494 return 0;
0495 }
0496 arch_initcall(_txx9_arch_init);
0497
0498 static int __init _txx9_device_init(void)
0499 {
0500 if (txx9_board_vec->device_init)
0501 txx9_board_vec->device_init();
0502 return 0;
0503 }
0504 device_initcall(_txx9_device_init);
0505
0506 int (*txx9_irq_dispatch)(int pending);
0507 asmlinkage void plat_irq_dispatch(void)
0508 {
0509 int pending = read_c0_status() & read_c0_cause() & ST0_IM;
0510 int irq = txx9_irq_dispatch(pending);
0511
0512 if (likely(irq >= 0))
0513 do_IRQ(irq);
0514 else
0515 spurious_interrupt();
0516 }
0517
0518
0519 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
0520 static unsigned long __swizzle_addr_none(unsigned long port)
0521 {
0522 return port;
0523 }
0524 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
0525 EXPORT_SYMBOL(__swizzle_addr_b);
0526 #endif
0527
0528 void __init txx9_physmap_flash_init(int no, unsigned long addr,
0529 unsigned long size,
0530 const struct physmap_flash_data *pdata)
0531 {
0532 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
0533 struct resource res = {
0534 .start = addr,
0535 .end = addr + size - 1,
0536 .flags = IORESOURCE_MEM,
0537 };
0538 struct platform_device *pdev;
0539 static struct mtd_partition parts[2];
0540 struct physmap_flash_data pdata_part;
0541
0542
0543 if (pdata->nr_parts == 0 && !pdata->parts &&
0544 addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
0545 !parts[0].name) {
0546 parts[0].name = "boot";
0547 parts[0].offset = 0x1fc00000 - addr;
0548 parts[0].size = addr + size - 0x1fc00000;
0549 parts[1].name = "user";
0550 parts[1].offset = 0;
0551 parts[1].size = 0x1fc00000 - addr;
0552 pdata_part = *pdata;
0553 pdata_part.nr_parts = ARRAY_SIZE(parts);
0554 pdata_part.parts = parts;
0555 pdata = &pdata_part;
0556 }
0557
0558 pdev = platform_device_alloc("physmap-flash", no);
0559 if (!pdev ||
0560 platform_device_add_resources(pdev, &res, 1) ||
0561 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
0562 platform_device_add(pdev))
0563 platform_device_put(pdev);
0564 #endif
0565 }
0566
0567 void __init txx9_ndfmc_init(unsigned long baseaddr,
0568 const struct txx9ndfmc_platform_data *pdata)
0569 {
0570 #if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC)
0571 struct resource res = {
0572 .start = baseaddr,
0573 .end = baseaddr + 0x1000 - 1,
0574 .flags = IORESOURCE_MEM,
0575 };
0576 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
0577
0578 if (!pdev ||
0579 platform_device_add_resources(pdev, &res, 1) ||
0580 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
0581 platform_device_add(pdev))
0582 platform_device_put(pdev);
0583 #endif
0584 }
0585
0586 #if IS_ENABLED(CONFIG_LEDS_GPIO)
0587 static DEFINE_SPINLOCK(txx9_iocled_lock);
0588
0589 #define TXX9_IOCLED_MAXLEDS 8
0590
0591 struct txx9_iocled_data {
0592 struct gpio_chip chip;
0593 u8 cur_val;
0594 void __iomem *mmioaddr;
0595 struct gpio_led_platform_data pdata;
0596 struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
0597 char names[TXX9_IOCLED_MAXLEDS][32];
0598 };
0599
0600 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
0601 {
0602 struct txx9_iocled_data *data = gpiochip_get_data(chip);
0603 return !!(data->cur_val & (1 << offset));
0604 }
0605
0606 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
0607 int value)
0608 {
0609 struct txx9_iocled_data *data = gpiochip_get_data(chip);
0610 unsigned long flags;
0611 spin_lock_irqsave(&txx9_iocled_lock, flags);
0612 if (value)
0613 data->cur_val |= 1 << offset;
0614 else
0615 data->cur_val &= ~(1 << offset);
0616 writeb(data->cur_val, data->mmioaddr);
0617 mmiowb();
0618 spin_unlock_irqrestore(&txx9_iocled_lock, flags);
0619 }
0620
0621 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
0622 {
0623 return 0;
0624 }
0625
0626 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
0627 int value)
0628 {
0629 txx9_iocled_set(chip, offset, value);
0630 return 0;
0631 }
0632
0633 void __init txx9_iocled_init(unsigned long baseaddr,
0634 int basenum, unsigned int num, int lowactive,
0635 const char *color, char **deftriggers)
0636 {
0637 struct txx9_iocled_data *iocled;
0638 struct platform_device *pdev;
0639 int i;
0640 static char *default_triggers[] __initdata = {
0641 "heartbeat",
0642 "disk-activity",
0643 "nand-disk",
0644 NULL,
0645 };
0646
0647 if (!deftriggers)
0648 deftriggers = default_triggers;
0649 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
0650 if (!iocled)
0651 return;
0652 iocled->mmioaddr = ioremap(baseaddr, 1);
0653 if (!iocled->mmioaddr)
0654 goto out_free;
0655 iocled->chip.get = txx9_iocled_get;
0656 iocled->chip.set = txx9_iocled_set;
0657 iocled->chip.direction_input = txx9_iocled_dir_in;
0658 iocled->chip.direction_output = txx9_iocled_dir_out;
0659 iocled->chip.label = "iocled";
0660 iocled->chip.base = basenum;
0661 iocled->chip.ngpio = num;
0662 if (gpiochip_add_data(&iocled->chip, iocled))
0663 goto out_unmap;
0664 if (basenum < 0)
0665 basenum = iocled->chip.base;
0666
0667 pdev = platform_device_alloc("leds-gpio", basenum);
0668 if (!pdev)
0669 goto out_gpio;
0670 iocled->pdata.num_leds = num;
0671 iocled->pdata.leds = iocled->leds;
0672 for (i = 0; i < num; i++) {
0673 struct gpio_led *led = &iocled->leds[i];
0674 snprintf(iocled->names[i], sizeof(iocled->names[i]),
0675 "iocled:%s:%u", color, i);
0676 led->name = iocled->names[i];
0677 led->gpio = basenum + i;
0678 led->active_low = lowactive;
0679 if (deftriggers && *deftriggers)
0680 led->default_trigger = *deftriggers++;
0681 }
0682 pdev->dev.platform_data = &iocled->pdata;
0683 if (platform_device_add(pdev))
0684 goto out_pdev;
0685 return;
0686
0687 out_pdev:
0688 platform_device_put(pdev);
0689 out_gpio:
0690 gpiochip_remove(&iocled->chip);
0691 out_unmap:
0692 iounmap(iocled->mmioaddr);
0693 out_free:
0694 kfree(iocled);
0695 }
0696 #else
0697 void __init txx9_iocled_init(unsigned long baseaddr,
0698 int basenum, unsigned int num, int lowactive,
0699 const char *color, char **deftriggers)
0700 {
0701 }
0702 #endif
0703
0704 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
0705 const struct txx9dmac_platform_data *pdata)
0706 {
0707 #if IS_ENABLED(CONFIG_TXX9_DMAC)
0708 struct resource res[] = {
0709 {
0710 .start = baseaddr,
0711 .end = baseaddr + 0x800 - 1,
0712 .flags = IORESOURCE_MEM,
0713 #ifndef CONFIG_MACH_TX49XX
0714 }, {
0715 .start = irq,
0716 .flags = IORESOURCE_IRQ,
0717 #endif
0718 }
0719 };
0720 #ifdef CONFIG_MACH_TX49XX
0721 struct resource chan_res[] = {
0722 {
0723 .flags = IORESOURCE_IRQ,
0724 }
0725 };
0726 #endif
0727 struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
0728 struct txx9dmac_chan_platform_data cpdata;
0729 int i;
0730
0731 if (!pdev ||
0732 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
0733 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
0734 platform_device_add(pdev)) {
0735 platform_device_put(pdev);
0736 return;
0737 }
0738 memset(&cpdata, 0, sizeof(cpdata));
0739 cpdata.dmac_dev = pdev;
0740 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
0741 #ifdef CONFIG_MACH_TX49XX
0742 chan_res[0].start = irq + i;
0743 #endif
0744 pdev = platform_device_alloc("txx9dmac-chan",
0745 id * TXX9_DMA_MAX_NR_CHANNELS + i);
0746 if (!pdev ||
0747 #ifdef CONFIG_MACH_TX49XX
0748 platform_device_add_resources(pdev, chan_res,
0749 ARRAY_SIZE(chan_res)) ||
0750 #endif
0751 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
0752 platform_device_add(pdev))
0753 platform_device_put(pdev);
0754 }
0755 #endif
0756 }
0757
0758 void __init txx9_aclc_init(unsigned long baseaddr, int irq,
0759 unsigned int dmac_id,
0760 unsigned int dma_chan_out,
0761 unsigned int dma_chan_in)
0762 {
0763 }
0764
0765 static struct bus_type txx9_sramc_subsys = {
0766 .name = "txx9_sram",
0767 .dev_name = "txx9_sram",
0768 };
0769
0770 struct txx9_sramc_dev {
0771 struct device dev;
0772 struct bin_attribute bindata_attr;
0773 void __iomem *base;
0774 };
0775
0776 static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
0777 struct bin_attribute *bin_attr,
0778 char *buf, loff_t pos, size_t size)
0779 {
0780 struct txx9_sramc_dev *dev = bin_attr->private;
0781 size_t ramsize = bin_attr->size;
0782
0783 if (pos >= ramsize)
0784 return 0;
0785 if (pos + size > ramsize)
0786 size = ramsize - pos;
0787 memcpy_fromio(buf, dev->base + pos, size);
0788 return size;
0789 }
0790
0791 static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
0792 struct bin_attribute *bin_attr,
0793 char *buf, loff_t pos, size_t size)
0794 {
0795 struct txx9_sramc_dev *dev = bin_attr->private;
0796 size_t ramsize = bin_attr->size;
0797
0798 if (pos >= ramsize)
0799 return 0;
0800 if (pos + size > ramsize)
0801 size = ramsize - pos;
0802 memcpy_toio(dev->base + pos, buf, size);
0803 return size;
0804 }
0805
0806 static void txx9_device_release(struct device *dev)
0807 {
0808 struct txx9_sramc_dev *tdev;
0809
0810 tdev = container_of(dev, struct txx9_sramc_dev, dev);
0811 kfree(tdev);
0812 }
0813
0814 void __init txx9_sramc_init(struct resource *r)
0815 {
0816 struct txx9_sramc_dev *dev;
0817 size_t size;
0818 int err;
0819
0820 err = subsys_system_register(&txx9_sramc_subsys, NULL);
0821 if (err)
0822 return;
0823 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
0824 if (!dev)
0825 return;
0826 size = resource_size(r);
0827 dev->base = ioremap(r->start, size);
0828 if (!dev->base) {
0829 kfree(dev);
0830 return;
0831 }
0832 dev->dev.release = &txx9_device_release;
0833 dev->dev.bus = &txx9_sramc_subsys;
0834 sysfs_bin_attr_init(&dev->bindata_attr);
0835 dev->bindata_attr.attr.name = "bindata";
0836 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
0837 dev->bindata_attr.read = txx9_sram_read;
0838 dev->bindata_attr.write = txx9_sram_write;
0839 dev->bindata_attr.size = size;
0840 dev->bindata_attr.private = dev;
0841 err = device_register(&dev->dev);
0842 if (err)
0843 goto exit_put;
0844 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
0845 if (err) {
0846 iounmap(dev->base);
0847 device_unregister(&dev->dev);
0848 }
0849 return;
0850 exit_put:
0851 iounmap(dev->base);
0852 put_device(&dev->dev);
0853 }