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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2000, 2001 Broadcom Corporation
0004  *
0005  * Copyright (C) 2002 MontaVista Software Inc.
0006  * Author: jsun@mvista.com or jsun@junsun.net
0007  */
0008 #include <linux/bcd.h>
0009 #include <linux/types.h>
0010 #include <linux/time.h>
0011 
0012 #include <asm/time.h>
0013 #include <asm/addrspace.h>
0014 #include <asm/io.h>
0015 
0016 #include <asm/sibyte/sb1250.h>
0017 #include <asm/sibyte/sb1250_regs.h>
0018 #include <asm/sibyte/sb1250_smbus.h>
0019 
0020 
0021 /* Xicor 1241 definitions */
0022 
0023 /*
0024  * Register bits
0025  */
0026 
0027 #define X1241REG_SR_BAT 0x80        /* currently on battery power */
0028 #define X1241REG_SR_RWEL 0x04       /* r/w latch is enabled, can write RTC */
0029 #define X1241REG_SR_WEL 0x02        /* r/w latch is unlocked, can enable r/w now */
0030 #define X1241REG_SR_RTCF 0x01       /* clock failed */
0031 #define X1241REG_BL_BP2 0x80        /* block protect 2 */
0032 #define X1241REG_BL_BP1 0x40        /* block protect 1 */
0033 #define X1241REG_BL_BP0 0x20        /* block protect 0 */
0034 #define X1241REG_BL_WD1 0x10
0035 #define X1241REG_BL_WD0 0x08
0036 #define X1241REG_HR_MIL 0x80        /* military time format */
0037 
0038 /*
0039  * Register numbers
0040  */
0041 
0042 #define X1241REG_BL 0x10        /* block protect bits */
0043 #define X1241REG_INT    0x11        /*  */
0044 #define X1241REG_SC 0x30        /* Seconds */
0045 #define X1241REG_MN 0x31        /* Minutes */
0046 #define X1241REG_HR 0x32        /* Hours */
0047 #define X1241REG_DT 0x33        /* Day of month */
0048 #define X1241REG_MO 0x34        /* Month */
0049 #define X1241REG_YR 0x35        /* Year */
0050 #define X1241REG_DW 0x36        /* Day of Week */
0051 #define X1241REG_Y2K    0x37        /* Year 2K */
0052 #define X1241REG_SR 0x3F        /* Status register */
0053 
0054 #define X1241_CCR_ADDRESS   0x6F
0055 
0056 #define SMB_CSR(reg)    IOADDR(A_SMB_REGISTER(1, reg))
0057 
0058 static int xicor_read(uint8_t addr)
0059 {
0060     while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
0061         ;
0062 
0063     __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
0064     __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA));
0065     __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
0066              SMB_CSR(R_SMB_START));
0067 
0068     while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
0069         ;
0070 
0071     __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
0072              SMB_CSR(R_SMB_START));
0073 
0074     while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
0075         ;
0076 
0077     if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
0078         /* Clear error bit by writing a 1 */
0079         __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
0080         return -1;
0081     }
0082 
0083     return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff;
0084 }
0085 
0086 static int xicor_write(uint8_t addr, int b)
0087 {
0088     while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
0089         ;
0090 
0091     __raw_writeq(addr, SMB_CSR(R_SMB_CMD));
0092     __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
0093     __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
0094              SMB_CSR(R_SMB_START));
0095 
0096     while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
0097         ;
0098 
0099     if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
0100         /* Clear error bit by writing a 1 */
0101         __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
0102         return -1;
0103     } else {
0104         return 0;
0105     }
0106 }
0107 
0108 int xicor_set_time(time64_t t)
0109 {
0110     struct rtc_time tm;
0111     int tmp;
0112     unsigned long flags;
0113 
0114     rtc_time64_to_tm(t, &tm);
0115     tm.tm_year += 1900;
0116 
0117     spin_lock_irqsave(&rtc_lock, flags);
0118     /* unlock writes to the CCR */
0119     xicor_write(X1241REG_SR, X1241REG_SR_WEL);
0120     xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL);
0121 
0122     /* trivial ones */
0123     tm.tm_sec = bin2bcd(tm.tm_sec);
0124     xicor_write(X1241REG_SC, tm.tm_sec);
0125 
0126     tm.tm_min = bin2bcd(tm.tm_min);
0127     xicor_write(X1241REG_MN, tm.tm_min);
0128 
0129     tm.tm_mday = bin2bcd(tm.tm_mday);
0130     xicor_write(X1241REG_DT, tm.tm_mday);
0131 
0132     /* tm_mon starts from 0, *ick* */
0133     tm.tm_mon ++;
0134     tm.tm_mon = bin2bcd(tm.tm_mon);
0135     xicor_write(X1241REG_MO, tm.tm_mon);
0136 
0137     /* year is split */
0138     tmp = tm.tm_year / 100;
0139     tm.tm_year %= 100;
0140     xicor_write(X1241REG_YR, tm.tm_year);
0141     xicor_write(X1241REG_Y2K, tmp);
0142 
0143     /* hour is the most tricky one */
0144     tmp = xicor_read(X1241REG_HR);
0145     if (tmp & X1241REG_HR_MIL) {
0146         /* 24 hour format */
0147         tm.tm_hour = bin2bcd(tm.tm_hour);
0148         tmp = (tmp & ~0x3f) | (tm.tm_hour & 0x3f);
0149     } else {
0150         /* 12 hour format, with 0x2 for pm */
0151         tmp = tmp & ~0x3f;
0152         if (tm.tm_hour >= 12) {
0153             tmp |= 0x20;
0154             tm.tm_hour -= 12;
0155         }
0156         tm.tm_hour = bin2bcd(tm.tm_hour);
0157         tmp |= tm.tm_hour;
0158     }
0159     xicor_write(X1241REG_HR, tmp);
0160 
0161     xicor_write(X1241REG_SR, 0);
0162     spin_unlock_irqrestore(&rtc_lock, flags);
0163 
0164     return 0;
0165 }
0166 
0167 time64_t xicor_get_time(void)
0168 {
0169     unsigned int year, mon, day, hour, min, sec, y2k;
0170     unsigned long flags;
0171 
0172     spin_lock_irqsave(&rtc_lock, flags);
0173     sec = xicor_read(X1241REG_SC);
0174     min = xicor_read(X1241REG_MN);
0175     hour = xicor_read(X1241REG_HR);
0176 
0177     if (hour & X1241REG_HR_MIL) {
0178         hour &= 0x3f;
0179     } else {
0180         if (hour & 0x20)
0181             hour = (hour & 0xf) + 0x12;
0182     }
0183 
0184     day = xicor_read(X1241REG_DT);
0185     mon = xicor_read(X1241REG_MO);
0186     year = xicor_read(X1241REG_YR);
0187     y2k = xicor_read(X1241REG_Y2K);
0188     spin_unlock_irqrestore(&rtc_lock, flags);
0189 
0190     sec = bcd2bin(sec);
0191     min = bcd2bin(min);
0192     hour = bcd2bin(hour);
0193     day = bcd2bin(day);
0194     mon = bcd2bin(mon);
0195     year = bcd2bin(year);
0196     y2k = bcd2bin(y2k);
0197 
0198     year += (y2k * 100);
0199 
0200     return mktime64(year, mon, day, hour, min, sec);
0201 }
0202 
0203 int xicor_probe(void)
0204 {
0205     return xicor_read(X1241REG_SC) != -1;
0206 }