mips/sgi-ip22/ip22-platform.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 #include <linux/init.h>
0003 #include <linux/if_ether.h>
0004 #include <linux/kernel.h>
0005 #include <linux/platform_device.h>
0006 #include <linux/dma-mapping.h>
0007
0008 #include <asm/paccess.h>
0009 #include <asm/sgi/ip22.h>
0010 #include <asm/sgi/hpc3.h>
0011 #include <asm/sgi/mc.h>
0012 #include <asm/sgi/seeq.h>
0013 #include <asm/sgi/wd.h>
0014
0015 static struct resource sgiwd93_0_resources[] = {
0016     {
0017         .name   = "eth0 irq",
0018         .start  = SGI_WD93_0_IRQ,
0019         .end    = SGI_WD93_0_IRQ,
0020         .flags  = IORESOURCE_IRQ
0021     }
0022 };
0023
0024 static struct sgiwd93_platform_data sgiwd93_0_pd = {
0025     .unit   = 0,
0026     .irq    = SGI_WD93_0_IRQ,
0027 };
0028
0029 static u64 sgiwd93_0_dma_mask = DMA_BIT_MASK(32);
0030
0031 static struct platform_device sgiwd93_0_device = {
0032     .name       = "sgiwd93",
0033     .id     = 0,
0034     .num_resources  = ARRAY_SIZE(sgiwd93_0_resources),
0035     .resource   = sgiwd93_0_resources,
0036     .dev = {
0037         .platform_data = &sgiwd93_0_pd,
0038         .dma_mask = &sgiwd93_0_dma_mask,
0039         .coherent_dma_mask = DMA_BIT_MASK(32),
0040     },
0041 };
0042
0043 static struct resource sgiwd93_1_resources[] = {
0044     {
0045         .name   = "eth0 irq",
0046         .start  = SGI_WD93_1_IRQ,
0047         .end    = SGI_WD93_1_IRQ,
0048         .flags  = IORESOURCE_IRQ
0049     }
0050 };
0051
0052 static struct sgiwd93_platform_data sgiwd93_1_pd = {
0053     .unit   = 1,
0054     .irq    = SGI_WD93_1_IRQ,
0055 };
0056
0057 static u64 sgiwd93_1_dma_mask = DMA_BIT_MASK(32);
0058
0059 static struct platform_device sgiwd93_1_device = {
0060     .name       = "sgiwd93",
0061     .id     = 1,
0062     .num_resources  = ARRAY_SIZE(sgiwd93_1_resources),
0063     .resource   = sgiwd93_1_resources,
0064     .dev = {
0065         .platform_data = &sgiwd93_1_pd,
0066         .dma_mask = &sgiwd93_1_dma_mask,
0067         .coherent_dma_mask = DMA_BIT_MASK(32),
0068     },
0069 };
0070
0071 /*
0072  * Create a platform device for the GPI port that receives the
0073  * image data from the embedded camera.
0074  */
0075 static int __init sgiwd93_devinit(void)
0076 {
0077     int res;
0078
0079     sgiwd93_0_pd.hregs  = &hpc3c0->scsi_chan0;
0080     sgiwd93_0_pd.wdregs = (unsigned char *) hpc3c0->scsi0_ext;
0081
0082     res = platform_device_register(&sgiwd93_0_device);
0083     if (res)
0084         return res;
0085
0086     if (!ip22_is_fullhouse())
0087         return 0;
0088
0089     sgiwd93_1_pd.hregs  = &hpc3c0->scsi_chan1;
0090     sgiwd93_1_pd.wdregs = (unsigned char *) hpc3c0->scsi1_ext;
0091
0092     return platform_device_register(&sgiwd93_1_device);
0093 }
0094
0095 device_initcall(sgiwd93_devinit);
0096
0097 static struct resource sgiseeq_0_resources[] = {
0098     {
0099         .name   = "eth0 irq",
0100         .start  = SGI_ENET_IRQ,
0101         .end    = SGI_ENET_IRQ,
0102         .flags  = IORESOURCE_IRQ
0103     }
0104 };
0105
0106 static struct sgiseeq_platform_data eth0_pd;
0107
0108 static u64 sgiseeq_dma_mask = DMA_BIT_MASK(32);
0109
0110 static struct platform_device eth0_device = {
0111     .name       = "sgiseeq",
0112     .id     = 0,
0113     .num_resources  = ARRAY_SIZE(sgiseeq_0_resources),
0114     .resource   = sgiseeq_0_resources,
0115     .dev = {
0116         .platform_data = &eth0_pd,
0117         .dma_mask = &sgiseeq_dma_mask,
0118         .coherent_dma_mask = DMA_BIT_MASK(32),
0119     },
0120 };
0121
0122 static struct resource sgiseeq_1_resources[] = {
0123     {
0124         .name   = "eth1 irq",
0125         .start  = SGI_GIO_0_IRQ,
0126         .end    = SGI_GIO_0_IRQ,
0127         .flags  = IORESOURCE_IRQ
0128     }
0129 };
0130
0131 static struct sgiseeq_platform_data eth1_pd;
0132
0133 static struct platform_device eth1_device = {
0134     .name       = "sgiseeq",
0135     .id     = 1,
0136     .num_resources  = ARRAY_SIZE(sgiseeq_1_resources),
0137     .resource   = sgiseeq_1_resources,
0138     .dev = {
0139         .platform_data = &eth1_pd,
0140     },
0141 };
0142
0143 /*
0144  * Create a platform device for the GPI port that receives the
0145  * image data from the embedded camera.
0146  */
0147 static int __init sgiseeq_devinit(void)
0148 {
0149     unsigned int pbdma __maybe_unused;
0150     int res, i;
0151
0152     eth0_pd.hpc = hpc3c0;
0153     eth0_pd.irq = SGI_ENET_IRQ;
0154 #define EADDR_NVOFS 250
0155     for (i = 0; i < 3; i++) {
0156         unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i);
0157
0158         eth0_pd.mac[2 * i]     = tmp >> 8;
0159         eth0_pd.mac[2 * i + 1] = tmp & 0xff;
0160     }
0161
0162     res = platform_device_register(&eth0_device);
0163     if (res)
0164         return res;
0165
0166     /* Second HPC is missing? */
0167     if (ip22_is_fullhouse() ||
0168         get_dbe(pbdma, (unsigned int *)&hpc3c1->pbdma[1]))
0169         return 0;
0170
0171     sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 | SGIMC_GIOPAR_EXP164 |
0172              SGIMC_GIOPAR_HPC264;
0173     hpc3c1->pbus_piocfg[0][0] = 0x3ffff;
0174     /* interrupt/config register on Challenge S Mezz board */
0175     hpc3c1->pbus_extregs[0][0] = 0x30;
0176
0177     eth1_pd.hpc = hpc3c1;
0178     eth1_pd.irq = SGI_GIO_0_IRQ;
0179 #define EADDR_NVOFS 250
0180     for (i = 0; i < 3; i++) {
0181         unsigned short tmp = ip22_eeprom_read(&hpc3c1->eeprom,
0182                               EADDR_NVOFS / 2 + i);
0183
0184         eth1_pd.mac[2 * i]     = tmp >> 8;
0185         eth1_pd.mac[2 * i + 1] = tmp & 0xff;
0186     }
0187
0188     return platform_device_register(&eth1_device);
0189 }
0190
0191 device_initcall(sgiseeq_devinit);
0192
0193 static int __init sgi_hal2_devinit(void)
0194 {
0195     return IS_ERR(platform_device_register_simple("sgihal2", 0, NULL, 0));
0196 }
0197
0198 device_initcall(sgi_hal2_devinit);
0199
0200 static int __init sgi_button_devinit(void)
0201 {
0202     if (ip22_is_fullhouse())
0203         return 0; /* full house has no volume buttons */
0204
0205     return IS_ERR(platform_device_register_simple("sgibtns", -1, NULL, 0));
0206 }
0207
0208 device_initcall(sgi_button_devinit);
0209
0210 static int __init sgi_ds1286_devinit(void)
0211 {
0212     struct resource res;
0213
0214     memset(&res, 0, sizeof(res));
0215     res.start = HPC3_CHIP0_BASE + offsetof(struct hpc3_regs, rtcregs);
0216     res.end = res.start + sizeof(hpc3c0->rtcregs) - 1;
0217     res.flags = IORESOURCE_MEM;
0218
0219     return IS_ERR(platform_device_register_simple("rtc-ds1286", -1,
0220                               &res, 1));
0221 }
0222
0223 device_initcall(sgi_ds1286_devinit);