mips/ralink/early_printk.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *
0004  *  Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
0005  */
0006
0007 #include <linux/io.h>
0008 #include <linux/serial_reg.h>
0009
0010 #include <asm/addrspace.h>
0011 #include <asm/setup.h>
0012
0013 #ifdef CONFIG_SOC_RT288X
0014 #define EARLY_UART_BASE     0x300c00
0015 #define CHIPID_BASE     0x300004
0016 #elif defined(CONFIG_SOC_MT7621)
0017 #define EARLY_UART_BASE     0x1E000c00
0018 #define CHIPID_BASE     0x1E000004
0019 #else
0020 #define EARLY_UART_BASE     0x10000c00
0021 #define CHIPID_BASE     0x10000004
0022 #endif
0023
0024 #define MT7628_CHIP_NAME1   0x20203832
0025
0026 #define UART_REG_TX     0x04
0027 #define UART_REG_LCR        0x0c
0028 #define UART_REG_LSR        0x14
0029 #define UART_REG_LSR_RT2880 0x1c
0030
0031 static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
0032 static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);
0033 static int init_complete;
0034
0035 static inline void uart_w32(u32 val, unsigned reg)
0036 {
0037     __raw_writel(val, uart_membase + reg);
0038 }
0039
0040 static inline u32 uart_r32(unsigned reg)
0041 {
0042     return __raw_readl(uart_membase + reg);
0043 }
0044
0045 static inline int soc_is_mt7628(void)
0046 {
0047     return IS_ENABLED(CONFIG_SOC_MT7620) &&
0048         (__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
0049 }
0050
0051 static void find_uart_base(void)
0052 {
0053     int i;
0054
0055     if (!soc_is_mt7628())
0056         return;
0057
0058     for (i = 0; i < 3; i++) {
0059         u32 reg = uart_r32(UART_REG_LCR + (0x100 * i));
0060
0061         if (!reg)
0062             continue;
0063
0064         uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE +
0065                               (0x100 * i));
0066         break;
0067     }
0068 }
0069
0070 void prom_putchar(char ch)
0071 {
0072     if (!init_complete) {
0073         find_uart_base();
0074         init_complete = 1;
0075     }
0076
0077     if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) {
0078         uart_w32((unsigned char)ch, UART_TX);
0079         while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
0080             ;
0081     } else {
0082         while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
0083             ;
0084         uart_w32((unsigned char)ch, UART_REG_TX);
0085         while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
0086             ;
0087     }
0088 }