mips/ralink/clk.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *
0004  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
0005  *  Copyright (C) 2013 John Crispin <john@phrozen.org>
0006  */
0007
0008 #include <linux/kernel.h>
0009 #include <linux/init.h>
0010 #include <linux/export.h>
0011 #include <linux/clkdev.h>
0012 #include <linux/clk.h>
0013 #include <linux/clk-provider.h>
0014
0015 #include <asm/time.h>
0016
0017 #include "common.h"
0018
0019 void ralink_clk_add(const char *dev, unsigned long rate)
0020 {
0021     struct clk *clk = clk_register_fixed_rate(NULL, dev, NULL, 0, rate);
0022
0023     if (!clk)
0024         panic("failed to add clock");
0025
0026     clkdev_create(clk, NULL, "%s", dev);
0027 }
0028
0029 void __init plat_time_init(void)
0030 {
0031     struct clk *clk;
0032
0033     ralink_of_remap();
0034
0035     ralink_clk_init();
0036     clk = clk_get_sys("cpu", NULL);
0037     if (IS_ERR(clk))
0038         panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
0039     pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
0040     mips_hpt_frequency = clk_get_rate(clk) / 2;
0041     clk_put(clk);
0042     timer_probe();
0043 }