mips/pci/pci-tx4927.c

0001 /*
0002  * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
0003  *      and RBTX49xx patch from CELF patch archive.
0004  *
0005  * Copyright 2001, 2003-2005 MontaVista Software Inc.
0006  * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
0007  * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
0008  *
0009  * This file is subject to the terms and conditions of the GNU General Public
0010  * License.  See the file "COPYING" in the main directory of this archive
0011  * for more details.
0012  */
0013 #include <linux/init.h>
0014 #include <linux/pci.h>
0015 #include <linux/kernel.h>
0016 #include <linux/interrupt.h>
0017 #include <asm/txx9/generic.h>
0018 #include <asm/txx9/tx4927.h>
0019
0020 int __init tx4927_report_pciclk(void)
0021 {
0022     int pciclk = 0;
0023
0024     pr_info("PCIC --%s PCICLK:",
0025         (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ?
0026         " PCI66" : "");
0027     if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
0028         u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
0029         switch ((unsigned long)ccfg &
0030             TX4927_CCFG_PCIDIVMODE_MASK) {
0031         case TX4927_CCFG_PCIDIVMODE_2_5:
0032             pciclk = txx9_cpu_clock * 2 / 5; break;
0033         case TX4927_CCFG_PCIDIVMODE_3:
0034             pciclk = txx9_cpu_clock / 3; break;
0035         case TX4927_CCFG_PCIDIVMODE_5:
0036             pciclk = txx9_cpu_clock / 5; break;
0037         case TX4927_CCFG_PCIDIVMODE_6:
0038             pciclk = txx9_cpu_clock / 6; break;
0039         }
0040         pr_cont("Internal(%u.%uMHz)",
0041             (pciclk + 50000) / 1000000,
0042             ((pciclk + 50000) / 100000) % 10);
0043     } else {
0044         pr_cont("External");
0045         pciclk = -1;
0046     }
0047     pr_cont("\n");
0048     return pciclk;
0049 }
0050
0051 int __init tx4927_pciclk66_setup(void)
0052 {
0053     int pciclk;
0054
0055     /* Assert M66EN */
0056     tx4927_ccfg_set(TX4927_CCFG_PCI66);
0057     /* Double PCICLK (if possible) */
0058     if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
0059         unsigned int pcidivmode = 0;
0060         u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
0061         pcidivmode = (unsigned long)ccfg &
0062             TX4927_CCFG_PCIDIVMODE_MASK;
0063         switch (pcidivmode) {
0064         case TX4927_CCFG_PCIDIVMODE_5:
0065         case TX4927_CCFG_PCIDIVMODE_2_5:
0066             pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
0067             pciclk = txx9_cpu_clock * 2 / 5;
0068             break;
0069         case TX4927_CCFG_PCIDIVMODE_6:
0070         case TX4927_CCFG_PCIDIVMODE_3:
0071         default:
0072             pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
0073             pciclk = txx9_cpu_clock / 3;
0074         }
0075         tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
0076                    pcidivmode);
0077         pr_debug("PCICLK: ccfg:%08lx\n",
0078              (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
0079     } else
0080         pciclk = -1;
0081     return pciclk;
0082 }
0083
0084 void __init tx4927_setup_pcierr_irq(void)
0085 {
0086     if (request_irq(TXX9_IRQ_BASE + TX4927_IR_PCIERR,
0087             tx4927_pcierr_interrupt,
0088             0, "PCI error",
0089             (void *)TX4927_PCIC_REG))
0090         pr_warn("Failed to request irq for PCIERR\n");
0091 }