mips/pci/pci-generic.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2016 Imagination Technologies
0004  * Author: Paul Burton <paul.burton@mips.com>
0005  *
0006  * pcibios_align_resource taken from arch/arm/kernel/bios32.c.
0007  */
0008
0009 #include <linux/pci.h>
0010
0011 /*
0012  * We need to avoid collisions with `mirrored' VGA ports
0013  * and other strange ISA hardware, so we always want the
0014  * addresses to be allocated in the 0x000-0x0ff region
0015  * modulo 0x400.
0016  *
0017  * Why? Because some silly external IO cards only decode
0018  * the low 10 bits of the IO address. The 0x00-0xff region
0019  * is reserved for motherboard devices that decode all 16
0020  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
0021  * but we want to try to avoid allocating at 0x2900-0x2bff
0022  * which might have be mirrored at 0x0100-0x03ff..
0023  */
0024 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
0025                 resource_size_t size, resource_size_t align)
0026 {
0027     struct pci_dev *dev = data;
0028     resource_size_t start = res->start;
0029     struct pci_host_bridge *host_bridge;
0030
0031     if (res->flags & IORESOURCE_IO && start & 0x300)
0032         start = (start + 0x3ff) & ~0x3ff;
0033
0034     start = (start + align - 1) & ~(align - 1);
0035
0036     host_bridge = pci_find_host_bridge(dev->bus);
0037
0038     if (host_bridge->align_resource)
0039         return host_bridge->align_resource(dev, res,
0040                 start, size, align);
0041
0042     return start;
0043 }
0044
0045 void pcibios_fixup_bus(struct pci_bus *bus)
0046 {
0047     pci_read_bridge_bases(bus);
0048 }
0049
0050 #ifdef pci_remap_iospace
0051 int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
0052 {
0053     unsigned long vaddr;
0054
0055     if (res->start != 0) {
0056         WARN_ONCE(1, "resource start address is not zero\n");
0057         return -ENODEV;
0058     }
0059
0060     vaddr = (unsigned long)ioremap(phys_addr, resource_size(res));
0061     set_io_port_base(vaddr);
0062     return 0;
0063 }
0064 #endif