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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /* IEEE754 floating point arithmetic
0003  * single precision
0004  */
0005 /*
0006  * MIPS floating point support
0007  * Copyright (C) 1994-2000 Algorithmics Ltd.
0008  */
0009 
0010 #include "ieee754sp.h"
0011 #include "ieee754dp.h"
0012 
0013 static inline union ieee754sp ieee754sp_nan_fdp(int xs, u64 xm)
0014 {
0015     return buildsp(xs, SP_EMAX + 1 + SP_EBIAS,
0016                xm >> (DP_FBITS - SP_FBITS));
0017 }
0018 
0019 union ieee754sp ieee754sp_fdp(union ieee754dp x)
0020 {
0021     union ieee754sp y;
0022     u32 rm;
0023 
0024     COMPXDP;
0025     COMPYSP;
0026 
0027     EXPLODEXDP;
0028 
0029     ieee754_clearcx();
0030 
0031     FLUSHXDP;
0032 
0033     switch (xc) {
0034     case IEEE754_CLASS_SNAN:
0035         x = ieee754dp_nanxcpt(x);
0036         EXPLODEXDP;
0037         fallthrough;
0038     case IEEE754_CLASS_QNAN:
0039         y = ieee754sp_nan_fdp(xs, xm);
0040         if (!ieee754_csr.nan2008) {
0041             EXPLODEYSP;
0042             if (!ieee754_class_nan(yc))
0043                 y = ieee754sp_indef();
0044         }
0045         return y;
0046 
0047     case IEEE754_CLASS_INF:
0048         return ieee754sp_inf(xs);
0049 
0050     case IEEE754_CLASS_ZERO:
0051         return ieee754sp_zero(xs);
0052 
0053     case IEEE754_CLASS_DNORM:
0054         /* can't possibly be sp representable */
0055         ieee754_setcx(IEEE754_UNDERFLOW);
0056         ieee754_setcx(IEEE754_INEXACT);
0057         if ((ieee754_csr.rm == FPU_CSR_RU && !xs) ||
0058                 (ieee754_csr.rm == FPU_CSR_RD && xs))
0059             return ieee754sp_mind(xs);
0060         return ieee754sp_zero(xs);
0061 
0062     case IEEE754_CLASS_NORM:
0063         break;
0064     }
0065 
0066     /*
0067      * Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
0068      */
0069     rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
0070          ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
0071 
0072     return ieee754sp_format(xs, xe, rm);
0073 }