mips/loongson64/init.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2009 Lemote Inc.
0004  * Author: Wu Zhangjin, wuzhangjin@gmail.com
0005  */
0006
0007 #include <linux/irqchip.h>
0008 #include <linux/logic_pio.h>
0009 #include <linux/memblock.h>
0010 #include <linux/of.h>
0011 #include <linux/of_address.h>
0012 #include <asm/bootinfo.h>
0013 #include <asm/traps.h>
0014 #include <asm/smp-ops.h>
0015 #include <asm/cacheflush.h>
0016 #include <asm/fw/fw.h>
0017
0018 #include <loongson.h>
0019 #include <boot_param.h>
0020
0021 #define NODE_ID_OFFSET_ADDR ((void __iomem *)TO_UNCAC(0x1001041c))
0022
0023 u32 node_id_offset;
0024
0025 static void __init mips_nmi_setup(void)
0026 {
0027     void *base;
0028
0029     base = (void *)(CAC_BASE + 0x380);
0030     memcpy(base, except_vec_nmi, 0x80);
0031     flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
0032 }
0033
0034 void ls7a_early_config(void)
0035 {
0036     node_id_offset = ((readl(NODE_ID_OFFSET_ADDR) >> 8) & 0x1f) + 36;
0037 }
0038
0039 void rs780e_early_config(void)
0040 {
0041     node_id_offset = 37;
0042 }
0043
0044 void virtual_early_config(void)
0045 {
0046     node_id_offset = 44;
0047 }
0048
0049 void __init szmem(unsigned int node)
0050 {
0051     u32 i, mem_type;
0052     static unsigned long num_physpages;
0053     u64 node_id, node_psize, start_pfn, end_pfn, mem_start, mem_size;
0054
0055     /* Otherwise come from DTB */
0056     if (loongson_sysconf.fw_interface != LOONGSON_LEFI)
0057         return;
0058
0059     /* Parse memory information and activate */
0060     for (i = 0; i < loongson_memmap->nr_map; i++) {
0061         node_id = loongson_memmap->map[i].node_id;
0062         if (node_id != node)
0063             continue;
0064
0065         mem_type = loongson_memmap->map[i].mem_type;
0066         mem_size = loongson_memmap->map[i].mem_size;
0067         mem_start = loongson_memmap->map[i].mem_start;
0068
0069         switch (mem_type) {
0070         case SYSTEM_RAM_LOW:
0071         case SYSTEM_RAM_HIGH:
0072             start_pfn = ((node_id << 44) + mem_start) >> PAGE_SHIFT;
0073             node_psize = (mem_size << 20) >> PAGE_SHIFT;
0074             end_pfn  = start_pfn + node_psize;
0075             num_physpages += node_psize;
0076             pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
0077                 (u32)node_id, mem_type, mem_start, mem_size);
0078             pr_info("       start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
0079                 start_pfn, end_pfn, num_physpages);
0080             memblock_add_node(PFN_PHYS(start_pfn),
0081                       PFN_PHYS(node_psize), node,
0082                       MEMBLOCK_NONE);
0083             break;
0084         case SYSTEM_RAM_RESERVED:
0085             pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
0086                 (u32)node_id, mem_type, mem_start, mem_size);
0087             memblock_reserve(((node_id << 44) + mem_start), mem_size << 20);
0088             break;
0089         }
0090     }
0091 }
0092
0093 #ifndef CONFIG_NUMA
0094 static void __init prom_init_memory(void)
0095 {
0096     szmem(0);
0097 }
0098 #endif
0099
0100 void __init prom_init(void)
0101 {
0102     fw_init_cmdline();
0103
0104     if (fw_arg2 == 0 || (fdt_magic(fw_arg2) == FDT_MAGIC)) {
0105         loongson_sysconf.fw_interface = LOONGSON_DTB;
0106         prom_dtb_init_env();
0107     } else {
0108         loongson_sysconf.fw_interface = LOONGSON_LEFI;
0109         prom_lefi_init_env();
0110     }
0111
0112     /* init base address of io space */
0113     set_io_port_base(PCI_IOBASE);
0114
0115     if (loongson_sysconf.early_config)
0116         loongson_sysconf.early_config();
0117
0118 #ifdef CONFIG_NUMA
0119     prom_init_numa_memory();
0120 #else
0121     prom_init_memory();
0122 #endif
0123
0124     /* Hardcode to CPU UART 0 */
0125     if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R)
0126         setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE), 0, 1024);
0127     else
0128         setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024);
0129
0130     register_smp_ops(&loongson3_smp_ops);
0131     board_nmi_handler_setup = mips_nmi_setup;
0132 }
0133
0134 static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_t hw_start,
0135                     resource_size_t size)
0136 {
0137     int ret = 0;
0138     struct logic_pio_hwaddr *range;
0139     unsigned long vaddr;
0140
0141     range = kzalloc(sizeof(*range), GFP_ATOMIC);
0142     if (!range)
0143         return -ENOMEM;
0144
0145     range->fwnode = fwnode;
0146     range->size = size = round_up(size, PAGE_SIZE);
0147     range->hw_start = hw_start;
0148     range->flags = LOGIC_PIO_CPU_MMIO;
0149
0150     ret = logic_pio_register_range(range);
0151     if (ret) {
0152         kfree(range);
0153         return ret;
0154     }
0155
0156     /* Legacy ISA must placed at the start of PCI_IOBASE */
0157     if (range->io_start != 0) {
0158         logic_pio_unregister_range(range);
0159         kfree(range);
0160         return -EINVAL;
0161     }
0162
0163     vaddr = PCI_IOBASE + range->io_start;
0164
0165     ioremap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL));
0166
0167     return 0;
0168 }
0169
0170 static __init void reserve_pio_range(void)
0171 {
0172     struct device_node *np;
0173
0174     for_each_node_by_name(np, "isa") {
0175         struct of_range range;
0176         struct of_range_parser parser;
0177
0178         pr_info("ISA Bridge: %pOF\n", np);
0179
0180         if (of_range_parser_init(&parser, np)) {
0181             pr_info("Failed to parse resources.\n");
0182             of_node_put(np);
0183             break;
0184         }
0185
0186         for_each_of_range(&parser, &range) {
0187             switch (range.flags & IORESOURCE_TYPE_BITS) {
0188             case IORESOURCE_IO:
0189                 pr_info(" IO 0x%016llx..0x%016llx  ->  0x%016llx\n",
0190                     range.cpu_addr,
0191                     range.cpu_addr + range.size - 1,
0192                     range.bus_addr);
0193                 if (add_legacy_isa_io(&np->fwnode, range.cpu_addr, range.size))
0194                     pr_warn("Failed to reserve legacy IO in Logic PIO\n");
0195                 break;
0196             case IORESOURCE_MEM:
0197                 pr_info(" MEM 0x%016llx..0x%016llx  ->  0x%016llx\n",
0198                     range.cpu_addr,
0199                     range.cpu_addr + range.size - 1,
0200                     range.bus_addr);
0201                 break;
0202             }
0203         }
0204     }
0205 }
0206
0207 void __init arch_init_irq(void)
0208 {
0209     reserve_pio_range();
0210     irqchip_init();
0211 }