mips/loongson64/env.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Based on Ocelot Linux port, which is
0004  * Copyright 2001 MontaVista Software Inc.
0005  * Author: jsun@mvista.com or jsun@junsun.net
0006  *
0007  * Copyright 2003 ICT CAS
0008  * Author: Michael Guo <guoyi@ict.ac.cn>
0009  *
0010  * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
0011  * Author: Fuxin Zhang, zhangfx@lemote.com
0012  *
0013  * Copyright (C) 2009 Lemote Inc.
0014  * Author: Wu Zhangjin, wuzhangjin@gmail.com
0015  */
0016 #include <linux/export.h>
0017 #include <linux/pci_ids.h>
0018 #include <asm/bootinfo.h>
0019 #include <loongson.h>
0020 #include <boot_param.h>
0021 #include <builtin_dtbs.h>
0022 #include <workarounds.h>
0023
0024 #define HOST_BRIDGE_CONFIG_ADDR ((void __iomem *)TO_UNCAC(0x1a000000))
0025
0026 u32 cpu_clock_freq;
0027 EXPORT_SYMBOL(cpu_clock_freq);
0028 struct efi_memory_map_loongson *loongson_memmap;
0029 struct loongson_system_configuration loongson_sysconf;
0030
0031 struct board_devices *eboard;
0032 struct interface_info *einter;
0033 struct loongson_special_attribute *especial;
0034
0035 u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
0036 u64 loongson_chiptemp[MAX_PACKAGES];
0037 u64 loongson_freqctrl[MAX_PACKAGES];
0038
0039 unsigned long long smp_group[4];
0040
0041 const char *get_system_type(void)
0042 {
0043     return "Generic Loongson64 System";
0044 }
0045
0046
0047 void __init prom_dtb_init_env(void)
0048 {
0049     if ((fw_arg2 < CKSEG0 || fw_arg2 > CKSEG1)
0050         && (fw_arg2 < XKPHYS || fw_arg2 > XKSEG))
0051
0052         loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin;
0053     else
0054         loongson_fdt_blob = (void *)fw_arg2;
0055 }
0056
0057 void __init prom_lefi_init_env(void)
0058 {
0059     struct boot_params *boot_p;
0060     struct loongson_params *loongson_p;
0061     struct system_loongson *esys;
0062     struct efi_cpuinfo_loongson *ecpu;
0063     struct irq_source_routing_table *eirq_source;
0064     u32 id;
0065     u16 vendor;
0066
0067     /* firmware arguments are initialized in head.S */
0068     boot_p = (struct boot_params *)fw_arg2;
0069     loongson_p = &(boot_p->efi.smbios.lp);
0070
0071     esys = (struct system_loongson *)
0072         ((u64)loongson_p + loongson_p->system_offset);
0073     ecpu = (struct efi_cpuinfo_loongson *)
0074         ((u64)loongson_p + loongson_p->cpu_offset);
0075     eboard = (struct board_devices *)
0076         ((u64)loongson_p + loongson_p->boarddev_table_offset);
0077     einter = (struct interface_info *)
0078         ((u64)loongson_p + loongson_p->interface_offset);
0079     especial = (struct loongson_special_attribute *)
0080         ((u64)loongson_p + loongson_p->special_offset);
0081     eirq_source = (struct irq_source_routing_table *)
0082         ((u64)loongson_p + loongson_p->irq_offset);
0083     loongson_memmap = (struct efi_memory_map_loongson *)
0084         ((u64)loongson_p + loongson_p->memory_offset);
0085
0086     cpu_clock_freq = ecpu->cpu_clock_freq;
0087     loongson_sysconf.cputype = ecpu->cputype;
0088     switch (ecpu->cputype) {
0089     case Legacy_3A:
0090     case Loongson_3A:
0091         loongson_sysconf.cores_per_node = 4;
0092         loongson_sysconf.cores_per_package = 4;
0093         smp_group[0] = 0x900000003ff01000;
0094         smp_group[1] = 0x900010003ff01000;
0095         smp_group[2] = 0x900020003ff01000;
0096         smp_group[3] = 0x900030003ff01000;
0097         loongson_chipcfg[0] = 0x900000001fe00180;
0098         loongson_chipcfg[1] = 0x900010001fe00180;
0099         loongson_chipcfg[2] = 0x900020001fe00180;
0100         loongson_chipcfg[3] = 0x900030001fe00180;
0101         loongson_chiptemp[0] = 0x900000001fe0019c;
0102         loongson_chiptemp[1] = 0x900010001fe0019c;
0103         loongson_chiptemp[2] = 0x900020001fe0019c;
0104         loongson_chiptemp[3] = 0x900030001fe0019c;
0105         loongson_freqctrl[0] = 0x900000001fe001d0;
0106         loongson_freqctrl[1] = 0x900010001fe001d0;
0107         loongson_freqctrl[2] = 0x900020001fe001d0;
0108         loongson_freqctrl[3] = 0x900030001fe001d0;
0109         loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
0110         break;
0111     case Legacy_3B:
0112     case Loongson_3B:
0113         loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
0114         loongson_sysconf.cores_per_package = 8;
0115         smp_group[0] = 0x900000003ff01000;
0116         smp_group[1] = 0x900010003ff05000;
0117         smp_group[2] = 0x900020003ff09000;
0118         smp_group[3] = 0x900030003ff0d000;
0119         loongson_chipcfg[0] = 0x900000001fe00180;
0120         loongson_chipcfg[1] = 0x900020001fe00180;
0121         loongson_chipcfg[2] = 0x900040001fe00180;
0122         loongson_chipcfg[3] = 0x900060001fe00180;
0123         loongson_chiptemp[0] = 0x900000001fe0019c;
0124         loongson_chiptemp[1] = 0x900020001fe0019c;
0125         loongson_chiptemp[2] = 0x900040001fe0019c;
0126         loongson_chiptemp[3] = 0x900060001fe0019c;
0127         loongson_freqctrl[0] = 0x900000001fe001d0;
0128         loongson_freqctrl[1] = 0x900020001fe001d0;
0129         loongson_freqctrl[2] = 0x900040001fe001d0;
0130         loongson_freqctrl[3] = 0x900060001fe001d0;
0131         loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
0132         break;
0133     default:
0134         loongson_sysconf.cores_per_node = 1;
0135         loongson_sysconf.cores_per_package = 1;
0136         loongson_chipcfg[0] = 0x900000001fe00180;
0137     }
0138
0139     loongson_sysconf.nr_cpus = ecpu->nr_cpus;
0140     loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
0141     loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
0142     if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
0143         loongson_sysconf.nr_cpus = NR_CPUS;
0144     loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
0145         loongson_sysconf.cores_per_node - 1) /
0146         loongson_sysconf.cores_per_node;
0147
0148     loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
0149     if (loongson_sysconf.dma_mask_bits < 32 ||
0150         loongson_sysconf.dma_mask_bits > 64)
0151         loongson_sysconf.dma_mask_bits = 32;
0152
0153     loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
0154     loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
0155     loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;
0156
0157     loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
0158     pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
0159         loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
0160         loongson_sysconf.vgabios_addr);
0161
0162     loongson_sysconf.workarounds |= esys->workarounds;
0163
0164     pr_info("CpuClock = %u\n", cpu_clock_freq);
0165
0166     /* Read the ID of PCI host bridge to detect bridge type */
0167     id = readl(HOST_BRIDGE_CONFIG_ADDR);
0168     vendor = id & 0xffff;
0169
0170     switch (vendor) {
0171     case PCI_VENDOR_ID_LOONGSON:
0172         pr_info("The bridge chip is LS7A\n");
0173         loongson_sysconf.bridgetype = LS7A;
0174         loongson_sysconf.early_config = ls7a_early_config;
0175         break;
0176     case PCI_VENDOR_ID_AMD:
0177     case PCI_VENDOR_ID_ATI:
0178         pr_info("The bridge chip is RS780E or SR5690\n");
0179         loongson_sysconf.bridgetype = RS780E;
0180         loongson_sysconf.early_config = rs780e_early_config;
0181         break;
0182     default:
0183         pr_info("The bridge chip is VIRTUAL\n");
0184         loongson_sysconf.bridgetype = VIRTUAL;
0185         loongson_sysconf.early_config = virtual_early_config;
0186         loongson_fdt_blob = __dtb_loongson64v_4core_virtio_begin;
0187         break;
0188     }
0189
0190     if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
0191         switch (read_c0_prid() & PRID_REV_MASK) {
0192         case PRID_REV_LOONGSON3A_R1:
0193         case PRID_REV_LOONGSON3A_R2_0:
0194         case PRID_REV_LOONGSON3A_R2_1:
0195         case PRID_REV_LOONGSON3A_R3_0:
0196         case PRID_REV_LOONGSON3A_R3_1:
0197             switch (loongson_sysconf.bridgetype) {
0198             case LS7A:
0199                 loongson_fdt_blob = __dtb_loongson64c_4core_ls7a_begin;
0200                 break;
0201             case RS780E:
0202                 loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
0203                 break;
0204             default:
0205                 break;
0206             }
0207             break;
0208         case PRID_REV_LOONGSON3B_R1:
0209         case PRID_REV_LOONGSON3B_R2:
0210             if (loongson_sysconf.bridgetype == RS780E)
0211                 loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
0212             break;
0213         default:
0214             break;
0215         }
0216     } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
0217         if (loongson_sysconf.bridgetype == LS7A)
0218             loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;
0219     }
0220
0221     if (!loongson_fdt_blob)
0222         pr_err("Failed to determine built-in Loongson64 dtb\n");
0223 }