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0009 #include <linux/cpufreq.h>
0010 #include <linux/errno.h>
0011 #include <linux/export.h>
0012
0013 #include <asm/mach-loongson2ef/loongson.h>
0014
0015 enum {
0016 DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT,
0017 DC_87PT, DC_DISABLE, DC_RESV
0018 };
0019
0020 struct cpufreq_frequency_table loongson2_clockmod_table[] = {
0021 {0, DC_RESV, CPUFREQ_ENTRY_INVALID},
0022 {0, DC_ZERO, CPUFREQ_ENTRY_INVALID},
0023 {0, DC_25PT, 0},
0024 {0, DC_37PT, 0},
0025 {0, DC_50PT, 0},
0026 {0, DC_62PT, 0},
0027 {0, DC_75PT, 0},
0028 {0, DC_87PT, 0},
0029 {0, DC_DISABLE, 0},
0030 {0, DC_RESV, CPUFREQ_TABLE_END},
0031 };
0032 EXPORT_SYMBOL_GPL(loongson2_clockmod_table);
0033
0034 int loongson2_cpu_set_rate(unsigned long rate_khz)
0035 {
0036 struct cpufreq_frequency_table *pos;
0037 int regval;
0038
0039 cpufreq_for_each_valid_entry(pos, loongson2_clockmod_table)
0040 if (rate_khz == pos->frequency)
0041 break;
0042 if (rate_khz != pos->frequency)
0043 return -ENOTSUPP;
0044
0045 regval = readl(LOONGSON_CHIPCFG);
0046 regval = (regval & ~0x7) | (pos->driver_data - 1);
0047 writel(regval, LOONGSON_CHIPCFG);
0048
0049 return 0;
0050 }
0051 EXPORT_SYMBOL_GPL(loongson2_cpu_set_rate);