loongson2ef/common/pm.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * loongson-specific suspend support
0004  *
0005  *  Copyright (C) 2009 Lemote Inc.
0006  *  Author: Wu Zhangjin <wuzhangjin@gmail.com>
0007  */
0008 #include <linux/suspend.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/pm.h>
0011
0012 #include <asm/i8259.h>
0013 #include <asm/mipsregs.h>
0014
0015 #include <loongson.h>
0016
0017 static unsigned int __maybe_unused cached_master_mask;  /* i8259A */
0018 static unsigned int __maybe_unused cached_slave_mask;
0019 static unsigned int __maybe_unused cached_bonito_irq_mask; /* bonito */
0020
0021 void arch_suspend_disable_irqs(void)
0022 {
0023     /* disable all mips events */
0024     local_irq_disable();
0025
0026 #ifdef CONFIG_I8259
0027     /* disable all events of i8259A */
0028     cached_slave_mask = inb(PIC_SLAVE_IMR);
0029     cached_master_mask = inb(PIC_MASTER_IMR);
0030
0031     outb(0xff, PIC_SLAVE_IMR);
0032     inb(PIC_SLAVE_IMR);
0033     outb(0xff, PIC_MASTER_IMR);
0034     inb(PIC_MASTER_IMR);
0035 #endif
0036     /* disable all events of bonito */
0037     cached_bonito_irq_mask = LOONGSON_INTEN;
0038     LOONGSON_INTENCLR = 0xffff;
0039     (void)LOONGSON_INTENCLR;
0040 }
0041
0042 void arch_suspend_enable_irqs(void)
0043 {
0044     /* enable all mips events */
0045     local_irq_enable();
0046 #ifdef CONFIG_I8259
0047     /* only enable the cached events of i8259A */
0048     outb(cached_slave_mask, PIC_SLAVE_IMR);
0049     outb(cached_master_mask, PIC_MASTER_IMR);
0050 #endif
0051     /* enable all cached events of bonito */
0052     LOONGSON_INTENSET = cached_bonito_irq_mask;
0053     (void)LOONGSON_INTENSET;
0054 }
0055
0056 /*
0057  * Setup the board-specific events for waking up loongson from wait mode
0058  */
0059 void __weak setup_wakeup_events(void)
0060 {
0061 }
0062
0063 /*
0064  * Check wakeup events
0065  */
0066 int __weak wakeup_loongson(void)
0067 {
0068     return 1;
0069 }
0070
0071 /*
0072  * If the events are really what we want to wakeup the CPU, wake it up
0073  * otherwise put the CPU asleep again.
0074  */
0075 static void wait_for_wakeup_events(void)
0076 {
0077     while (!wakeup_loongson())
0078         writel(readl(LOONGSON_CHIPCFG) & ~0x7, LOONGSON_CHIPCFG);
0079 }
0080
0081 /*
0082  * Stop all perf counters
0083  *
0084  * $24 is the control register of Loongson perf counter
0085  */
0086 static inline void stop_perf_counters(void)
0087 {
0088     __write_64bit_c0_register($24, 0, 0);
0089 }
0090
0091
0092 static void loongson_suspend_enter(void)
0093 {
0094     unsigned int cached_cpu_freq;
0095
0096     /* setup wakeup events via enabling the IRQs */
0097     setup_wakeup_events();
0098
0099     stop_perf_counters();
0100
0101     cached_cpu_freq = readl(LOONGSON_CHIPCFG);
0102
0103     /* Put CPU into wait mode */
0104     writel(readl(LOONGSON_CHIPCFG) & ~0x7, LOONGSON_CHIPCFG);
0105
0106     /* wait for the given events to wakeup cpu from wait mode */
0107     wait_for_wakeup_events();
0108
0109     writel(cached_cpu_freq, LOONGSON_CHIPCFG);
0110
0111     mmiowb();
0112 }
0113
0114 void __weak mach_suspend(void)
0115 {
0116 }
0117
0118 void __weak mach_resume(void)
0119 {
0120 }
0121
0122 static int loongson_pm_enter(suspend_state_t state)
0123 {
0124     mach_suspend();
0125
0126     /* processor specific suspend */
0127     loongson_suspend_enter();
0128
0129     mach_resume();
0130
0131     return 0;
0132 }
0133
0134 static int loongson_pm_valid_state(suspend_state_t state)
0135 {
0136     switch (state) {
0137     case PM_SUSPEND_ON:
0138     case PM_SUSPEND_STANDBY:
0139     case PM_SUSPEND_MEM:
0140         return 1;
0141
0142     default:
0143         return 0;
0144     }
0145 }
0146
0147 static const struct platform_suspend_ops loongson_pm_ops = {
0148     .valid  = loongson_pm_valid_state,
0149     .enter  = loongson_pm_enter,
0150 };
0151
0152 static int __init loongson_pm_init(void)
0153 {
0154     suspend_set_ops(&loongson_pm_ops);
0155
0156     return 0;
0157 }
0158 arch_initcall(loongson_pm_init);