loongson2ef/common/irq.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
0004  * Author: Fuxin Zhang, zhangfx@lemote.com
0005  */
0006 #include <linux/delay.h>
0007 #include <linux/interrupt.h>
0008
0009 #include <loongson.h>
0010 /*
0011  * the first level int-handler will jump here if it is a bonito irq
0012  */
0013 void bonito_irqdispatch(void)
0014 {
0015     u32 int_status;
0016     int i;
0017
0018     /* workaround the IO dma problem: let cpu looping to allow DMA finish */
0019     int_status = LOONGSON_INTISR;
0020     while (int_status & (1 << 10)) {
0021         udelay(1);
0022         int_status = LOONGSON_INTISR;
0023     }
0024
0025     /* Get pending sources, masked by current enables */
0026     int_status = LOONGSON_INTISR & LOONGSON_INTEN;
0027
0028     if (int_status) {
0029         i = __ffs(int_status);
0030         do_IRQ(LOONGSON_IRQ_BASE + i);
0031     }
0032 }
0033
0034 asmlinkage void plat_irq_dispatch(void)
0035 {
0036     unsigned int pending;
0037
0038     pending = read_c0_cause() & read_c0_status() & ST0_IM;
0039
0040     /* machine-specific plat_irq_dispatch */
0041     mach_irq_dispatch(pending);
0042 }
0043
0044 void __init arch_init_irq(void)
0045 {
0046     /*
0047      * Clear all of the interrupts while we change the able around a bit.
0048      * int-handler is not on bootstrap
0049      */
0050     clear_c0_status(ST0_IM | ST0_BEV);
0051
0052     /* no steer */
0053     LOONGSON_INTSTEER = 0;
0054
0055     /*
0056      * Mask out all interrupt by writing "1" to all bit position in
0057      * the interrupt reset reg.
0058      */
0059     LOONGSON_INTENCLR = ~0;
0060
0061     /* machine specific irq init */
0062     mach_init_irq();
0063 }