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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2009 Lemote Inc.
0004  * Author: Wu Zhangjin, wuzhangjin@gmail.com
0005  */
0006 
0007 #include <linux/memblock.h>
0008 #include <asm/bootinfo.h>
0009 #include <asm/traps.h>
0010 #include <asm/smp-ops.h>
0011 #include <asm/cacheflush.h>
0012 #include <asm/fw/fw.h>
0013 
0014 #include <loongson.h>
0015 
0016 /* Loongson CPU address windows config space base address */
0017 unsigned long __maybe_unused _loongson_addrwincfg_base;
0018 
0019 static void __init mips_nmi_setup(void)
0020 {
0021     void *base;
0022 
0023     base = (void *)(CAC_BASE + 0x380);
0024     memcpy(base, except_vec_nmi, 0x80);
0025     flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
0026 }
0027 
0028 void __init prom_init(void)
0029 {
0030 #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
0031     _loongson_addrwincfg_base = (unsigned long)
0032         ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE);
0033 #endif
0034 
0035     fw_init_cmdline();
0036     prom_init_machtype();
0037     prom_init_env();
0038 
0039     /* init base address of io space */
0040     set_io_port_base((unsigned long)
0041         ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
0042     prom_init_memory();
0043 
0044     /*init the uart base address */
0045     prom_init_uart_base();
0046     board_nmi_handler_setup = mips_nmi_setup;
0047 }