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0008 #include <linux/export.h>
0009 #include <linux/clk.h>
0010 #include <asm/bootinfo.h>
0011 #include <asm/time.h>
0012
0013 #include <lantiq_soc.h>
0014
0015 #include "../prom.h"
0016
0017 #define SOC_DANUBE "Danube"
0018 #define SOC_TWINPASS "Twinpass"
0019 #define SOC_AMAZON_SE "Amazon_SE"
0020 #define SOC_AR9 "AR9"
0021 #define SOC_GR9 "GRX200"
0022 #define SOC_VR9 "xRX200"
0023 #define SOC_VRX220 "xRX220"
0024 #define SOC_AR10 "xRX300"
0025 #define SOC_GRX390 "xRX330"
0026
0027 #define COMP_DANUBE "lantiq,danube"
0028 #define COMP_TWINPASS "lantiq,twinpass"
0029 #define COMP_AMAZON_SE "lantiq,ase"
0030 #define COMP_AR9 "lantiq,ar9"
0031 #define COMP_GR9 "lantiq,gr9"
0032 #define COMP_VR9 "lantiq,vr9"
0033 #define COMP_AR10 "lantiq,ar10"
0034 #define COMP_GRX390 "lantiq,grx390"
0035
0036 #define PART_SHIFT 12
0037 #define PART_MASK 0x0FFFFFFF
0038 #define REV_SHIFT 28
0039 #define REV_MASK 0xF0000000
0040
0041 void __init ltq_soc_detect(struct ltq_soc_info *i)
0042 {
0043 i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
0044 i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
0045 sprintf(i->rev_type, "1.%d", i->rev);
0046 switch (i->partnum) {
0047 case SOC_ID_DANUBE1:
0048 case SOC_ID_DANUBE2:
0049 i->name = SOC_DANUBE;
0050 i->type = SOC_TYPE_DANUBE;
0051 i->compatible = COMP_DANUBE;
0052 break;
0053
0054 case SOC_ID_TWINPASS:
0055 i->name = SOC_TWINPASS;
0056 i->type = SOC_TYPE_DANUBE;
0057 i->compatible = COMP_TWINPASS;
0058 break;
0059
0060 case SOC_ID_ARX188:
0061 case SOC_ID_ARX168_1:
0062 case SOC_ID_ARX168_2:
0063 case SOC_ID_ARX182:
0064 i->name = SOC_AR9;
0065 i->type = SOC_TYPE_AR9;
0066 i->compatible = COMP_AR9;
0067 break;
0068
0069 case SOC_ID_GRX188:
0070 case SOC_ID_GRX168:
0071 i->name = SOC_GR9;
0072 i->type = SOC_TYPE_AR9;
0073 i->compatible = COMP_GR9;
0074 break;
0075
0076 case SOC_ID_AMAZON_SE_1:
0077 case SOC_ID_AMAZON_SE_2:
0078 #ifdef CONFIG_PCI
0079 panic("ase is only supported for non pci kernels");
0080 #endif
0081 i->name = SOC_AMAZON_SE;
0082 i->type = SOC_TYPE_AMAZON_SE;
0083 i->compatible = COMP_AMAZON_SE;
0084 break;
0085
0086 case SOC_ID_VRX282:
0087 case SOC_ID_VRX268:
0088 case SOC_ID_VRX288:
0089 i->name = SOC_VR9;
0090 i->type = SOC_TYPE_VR9;
0091 i->compatible = COMP_VR9;
0092 break;
0093
0094 case SOC_ID_GRX268:
0095 case SOC_ID_GRX288:
0096 i->name = SOC_GR9;
0097 i->type = SOC_TYPE_VR9;
0098 i->compatible = COMP_GR9;
0099 break;
0100
0101 case SOC_ID_VRX268_2:
0102 case SOC_ID_VRX288_2:
0103 i->name = SOC_VR9;
0104 i->type = SOC_TYPE_VR9_2;
0105 i->compatible = COMP_VR9;
0106 break;
0107
0108 case SOC_ID_VRX220:
0109 i->name = SOC_VRX220;
0110 i->type = SOC_TYPE_VRX220;
0111 i->compatible = COMP_VR9;
0112 break;
0113
0114 case SOC_ID_GRX282_2:
0115 case SOC_ID_GRX288_2:
0116 i->name = SOC_GR9;
0117 i->type = SOC_TYPE_VR9_2;
0118 i->compatible = COMP_GR9;
0119 break;
0120
0121 case SOC_ID_ARX362:
0122 case SOC_ID_ARX368:
0123 case SOC_ID_ARX382:
0124 case SOC_ID_ARX388:
0125 case SOC_ID_URX388:
0126 i->name = SOC_AR10;
0127 i->type = SOC_TYPE_AR10;
0128 i->compatible = COMP_AR10;
0129 break;
0130
0131 case SOC_ID_GRX383:
0132 case SOC_ID_GRX369:
0133 case SOC_ID_GRX387:
0134 case SOC_ID_GRX389:
0135 i->name = SOC_GRX390;
0136 i->type = SOC_TYPE_GRX390;
0137 i->compatible = COMP_GRX390;
0138 break;
0139
0140 default:
0141 unreachable();
0142 break;
0143 }
0144 }