mips/lantiq/prom.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *
0004  * Copyright (C) 2010 John Crispin <john@phrozen.org>
0005  */
0006
0007 #include <linux/export.h>
0008 #include <linux/clk.h>
0009 #include <linux/memblock.h>
0010 #include <linux/of_fdt.h>
0011
0012 #include <asm/bootinfo.h>
0013 #include <asm/time.h>
0014 #include <asm/prom.h>
0015
0016 #include <lantiq.h>
0017
0018 #include "prom.h"
0019 #include "clk.h"
0020
0021 /* access to the ebu needs to be locked between different drivers */
0022 DEFINE_SPINLOCK(ebu_lock);
0023 EXPORT_SYMBOL_GPL(ebu_lock);
0024
0025 /*
0026  * This is needed by the VPE loader code, just set it to 0 and assume
0027  * that the firmware hardcodes this value to something useful.
0028  */
0029 unsigned long physical_memsize = 0L;
0030
0031 /*
0032  * this struct is filled by the soc specific detection code and holds
0033  * information about the specific soc type, revision and name
0034  */
0035 static struct ltq_soc_info soc_info;
0036
0037 const char *get_system_type(void)
0038 {
0039     return soc_info.sys_type;
0040 }
0041
0042 int ltq_soc_type(void)
0043 {
0044     return soc_info.type;
0045 }
0046
0047 static void __init prom_init_cmdline(void)
0048 {
0049     int argc = fw_arg0;
0050     char **argv = (char **) KSEG1ADDR(fw_arg1);
0051     int i;
0052
0053     arcs_cmdline[0] = '\0';
0054
0055     for (i = 0; i < argc; i++) {
0056         char *p = (char *) KSEG1ADDR(argv[i]);
0057
0058         if (CPHYSADDR(p) && *p) {
0059             strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
0060             strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
0061         }
0062     }
0063 }
0064
0065 void __init plat_mem_setup(void)
0066 {
0067     void *dtb;
0068
0069     ioport_resource.start = IOPORT_RESOURCE_START;
0070     ioport_resource.end = IOPORT_RESOURCE_END;
0071     iomem_resource.start = IOMEM_RESOURCE_START;
0072     iomem_resource.end = IOMEM_RESOURCE_END;
0073
0074     set_io_port_base((unsigned long) KSEG1);
0075
0076     dtb = get_fdt();
0077     if (dtb == NULL)
0078         panic("no dtb found");
0079
0080     /*
0081      * Load the devicetree. This causes the chosen node to be
0082      * parsed resulting in our memory appearing
0083      */
0084     __dt_setup_arch(dtb);
0085 }
0086
0087 void __init prom_init(void)
0088 {
0089     /* call the soc specific detetcion code and get it to fill soc_info */
0090     ltq_soc_detect(&soc_info);
0091     snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s",
0092         soc_info.name, soc_info.rev_type);
0093     soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';
0094     pr_info("SoC: %s\n", soc_info.sys_type);
0095     prom_init_cmdline();
0096
0097 #if defined(CONFIG_MIPS_MT_SMP)
0098     if (register_vsmp_smp_ops())
0099         panic("failed to register_vsmp_smp_ops()");
0100 #endif
0101 }