lantiq/falcon/reset.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *
0004  * Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com>
0005  * Copyright (C) 2012 John Crispin <john@phrozen.org>
0006  */
0007
0008 #include <linux/init.h>
0009 #include <linux/io.h>
0010 #include <linux/pm.h>
0011 #include <asm/reboot.h>
0012 #include <linux/export.h>
0013
0014 #include <lantiq_soc.h>
0015
0016 /*
0017  * Dummy implementation.  Used to allow platform code to find out what
0018  * source was booted from
0019  */
0020 unsigned char ltq_boot_select(void)
0021 {
0022     return BS_SPI;
0023 }
0024
0025 #define BOOT_REG_BASE   (KSEG1 | 0x1F200000)
0026 #define BOOT_PW1_REG    (BOOT_REG_BASE | 0x20)
0027 #define BOOT_PW2_REG    (BOOT_REG_BASE | 0x24)
0028 #define BOOT_PW1    0x4C545100
0029 #define BOOT_PW2    0x0051544C
0030
0031 #define WDT_REG_BASE    (KSEG1 | 0x1F8803F0)
0032 #define WDT_PW1     0x00BE0000
0033 #define WDT_PW2     0x00DC0000
0034
0035 static void machine_restart(char *command)
0036 {
0037     local_irq_disable();
0038
0039     /* reboot magic */
0040     ltq_w32(BOOT_PW1, (void *)BOOT_PW1_REG); /* 'LTQ\0' */
0041     ltq_w32(BOOT_PW2, (void *)BOOT_PW2_REG); /* '\0QTL' */
0042     ltq_w32(0, (void *)BOOT_REG_BASE); /* reset Bootreg RVEC */
0043
0044     /* watchdog magic */
0045     ltq_w32(WDT_PW1, (void *)WDT_REG_BASE);
0046     ltq_w32(WDT_PW2 |
0047         (0x3 << 26) | /* PWL */
0048         (0x2 << 24) | /* CLKDIV */
0049         (0x1 << 31) | /* enable */
0050         (1), /* reload */
0051         (void *)WDT_REG_BASE);
0052     unreachable();
0053 }
0054
0055 static void machine_halt(void)
0056 {
0057     local_irq_disable();
0058     unreachable();
0059 }
0060
0061 static void machine_power_off(void)
0062 {
0063     local_irq_disable();
0064     unreachable();
0065 }
0066
0067 static int __init mips_reboot_setup(void)
0068 {
0069     _machine_restart = machine_restart;
0070     _machine_halt = machine_halt;
0071     pm_power_off = machine_power_off;
0072     return 0;
0073 }
0074
0075 arch_initcall(mips_reboot_setup);