mips/kernel/r4k_switch.S

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 1994, 1995, 1996, 1998, 1999, 2002, 2003 Ralf Baechle
0007  * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
0008  * Copyright (C) 1994, 1995, 1996, by Andreas Busse
0009  * Copyright (C) 1999 Silicon Graphics, Inc.
0010  * Copyright (C) 2000 MIPS Technologies, Inc.
0011  *    written by Carsten Langgaard, carstenl@mips.com
0012  */
0013 #include <asm/asm.h>
0014 #include <asm/cachectl.h>
0015 #include <asm/mipsregs.h>
0016 #include <asm/asm-offsets.h>
0017 #include <asm/regdef.h>
0018 #include <asm/stackframe.h>
0019 #include <asm/thread_info.h>
0020
0021 #include <asm/asmmacro.h>
0022
0023 /*
0024  * task_struct *resume(task_struct *prev, task_struct *next,
0025  *             struct thread_info *next_ti)
0026  */
0027     .align  5
0028     LEAF(resume)
0029     mfc0    t1, CP0_STATUS
0030     LONG_S  t1, THREAD_STATUS(a0)
0031     cpu_save_nonscratch a0
0032     LONG_S  ra, THREAD_REG31(a0)
0033
0034 #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
0035     PTR_LA  t8, __stack_chk_guard
0036     LONG_L  t9, TASK_STACK_CANARY(a1)
0037     LONG_S  t9, 0(t8)
0038 #endif
0039
0040     /*
0041      * The order of restoring the registers takes care of the race
0042      * updating $28, $29 and kernelsp without disabling ints.
0043      */
0044     move    $28, a2
0045     cpu_restore_nonscratch a1
0046
0047     PTR_ADDU    t0, $28, _THREAD_SIZE - 32
0048     set_saved_sp    t0, t1, t2
0049     mfc0    t1, CP0_STATUS      /* Do we really need this? */
0050     li  a3, 0xff01
0051     and t1, a3
0052     LONG_L  a2, THREAD_STATUS(a1)
0053     nor a3, $0, a3
0054     and a2, a3
0055     or  a2, t1
0056     mtc0    a2, CP0_STATUS
0057     move    v0, a0
0058     jr  ra
0059     END(resume)