mips/kernel/r2300_switch.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * r2300_switch.S: R2300 specific task switching code.
0004  *
0005  * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
0006  * Copyright (C) 1994, 1995, 1996 by Andreas Busse
0007  *
0008  * Multi-cpu abstraction and macros for easier reading:
0009  * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
0010  *
0011  * Further modifications to make this work:
0012  * Copyright (c) 1998-2000 Harald Koerfgen
0013  */
0014 #include <asm/asm.h>
0015 #include <asm/cachectl.h>
0016 #include <asm/export.h>
0017 #include <asm/fpregdef.h>
0018 #include <asm/mipsregs.h>
0019 #include <asm/asm-offsets.h>
0020 #include <asm/regdef.h>
0021 #include <asm/stackframe.h>
0022 #include <asm/thread_info.h>
0023
0024 #include <asm/asmmacro.h>
0025
0026     .set    mips1
0027     .align  5
0028
0029 /*
0030  * task_struct *resume(task_struct *prev, task_struct *next,
0031  *             struct thread_info *next_ti)
0032  */
0033 LEAF(resume)
0034     mfc0    t1, CP0_STATUS
0035     sw  t1, THREAD_STATUS(a0)
0036     cpu_save_nonscratch a0
0037     sw  ra, THREAD_REG31(a0)
0038
0039 #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
0040     PTR_LA  t8, __stack_chk_guard
0041     LONG_L  t9, TASK_STACK_CANARY(a1)
0042     LONG_S  t9, 0(t8)
0043 #endif
0044
0045     /*
0046      * The order of restoring the registers takes care of the race
0047      * updating $28, $29 and kernelsp without disabling ints.
0048      */
0049     move    $28, a2
0050     cpu_restore_nonscratch a1
0051
0052     addiu   t1, $28, _THREAD_SIZE - 32
0053     sw  t1, kernelsp
0054
0055     mfc0    t1, CP0_STATUS      /* Do we really need this? */
0056     li  a3, 0xff01
0057     and t1, a3
0058     lw  a2, THREAD_STATUS(a1)
0059     nor a3, $0, a3
0060     and a2, a3
0061     or  a2, t1
0062     mtc0    a2, CP0_STATUS
0063     move    v0, a0
0064     jr  ra
0065     END(resume)