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0007 #include <linux/delay.h>
0008 #include <linux/kernel.h>
0009 #include <linux/sched.h>
0010 #include <linux/seq_file.h>
0011 #include <asm/bootinfo.h>
0012 #include <asm/cpu.h>
0013 #include <asm/cpu-features.h>
0014 #include <asm/idle.h>
0015 #include <asm/mipsregs.h>
0016 #include <asm/processor.h>
0017 #include <asm/prom.h>
0018
0019 unsigned int vced_count, vcei_count;
0020
0021
0022
0023
0024 static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);
0025
0026 int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)
0027 {
0028 return raw_notifier_chain_register(&proc_cpuinfo_chain, nb);
0029 }
0030
0031 int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v)
0032 {
0033 return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v);
0034 }
0035
0036 static int show_cpuinfo(struct seq_file *m, void *v)
0037 {
0038 struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args;
0039 unsigned long n = (unsigned long) v - 1;
0040 unsigned int version = cpu_data[n].processor_id;
0041 unsigned int fp_vers = cpu_data[n].fpu_id;
0042 char fmt[64];
0043 int i;
0044
0045 #ifdef CONFIG_SMP
0046 if (!cpu_online(n))
0047 return 0;
0048 #endif
0049
0050
0051
0052
0053 if (n == 0) {
0054 seq_printf(m, "system type\t\t: %s\n", get_system_type());
0055 if (mips_get_machine_name())
0056 seq_printf(m, "machine\t\t\t: %s\n",
0057 mips_get_machine_name());
0058 }
0059
0060 seq_printf(m, "processor\t\t: %ld\n", n);
0061 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
0062 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
0063 seq_printf(m, fmt, __cpu_name[n],
0064 (version >> 4) & 0x0f, version & 0x0f,
0065 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
0066 seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
0067 cpu_data[n].udelay_val / (500000/HZ),
0068 (cpu_data[n].udelay_val / (5000/HZ)) % 100);
0069 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
0070 seq_printf(m, "microsecond timers\t: %s\n",
0071 cpu_has_counter ? "yes" : "no");
0072 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
0073 seq_printf(m, "extra interrupt vector\t: %s\n",
0074 cpu_has_divec ? "yes" : "no");
0075 seq_printf(m, "hardware watchpoint\t: %s",
0076 cpu_has_watch ? "yes, " : "no\n");
0077 if (cpu_has_watch) {
0078 seq_printf(m, "count: %d, address/irw mask: [",
0079 cpu_data[n].watch_reg_count);
0080 for (i = 0; i < cpu_data[n].watch_reg_count; i++)
0081 seq_printf(m, "%s0x%04x", i ? ", " : "",
0082 cpu_data[n].watch_reg_masks[i]);
0083 seq_puts(m, "]\n");
0084 }
0085
0086 seq_puts(m, "isa\t\t\t:");
0087 if (cpu_has_mips_1)
0088 seq_puts(m, " mips1");
0089 if (cpu_has_mips_2)
0090 seq_puts(m, " mips2");
0091 if (cpu_has_mips_3)
0092 seq_puts(m, " mips3");
0093 if (cpu_has_mips_4)
0094 seq_puts(m, " mips4");
0095 if (cpu_has_mips_5)
0096 seq_puts(m, " mips5");
0097 if (cpu_has_mips32r1)
0098 seq_puts(m, " mips32r1");
0099 if (cpu_has_mips32r2)
0100 seq_puts(m, " mips32r2");
0101 if (cpu_has_mips32r5)
0102 seq_puts(m, " mips32r5");
0103 if (cpu_has_mips32r6)
0104 seq_puts(m, " mips32r6");
0105 if (cpu_has_mips64r1)
0106 seq_puts(m, " mips64r1");
0107 if (cpu_has_mips64r2)
0108 seq_puts(m, " mips64r2");
0109 if (cpu_has_mips64r5)
0110 seq_puts(m, " mips64r5");
0111 if (cpu_has_mips64r6)
0112 seq_puts(m, " mips64r6");
0113 seq_puts(m, "\n");
0114
0115 seq_puts(m, "ASEs implemented\t:");
0116 if (cpu_has_mips16)
0117 seq_puts(m, " mips16");
0118 if (cpu_has_mips16e2)
0119 seq_puts(m, " mips16e2");
0120 if (cpu_has_mdmx)
0121 seq_puts(m, " mdmx");
0122 if (cpu_has_mips3d)
0123 seq_puts(m, " mips3d");
0124 if (cpu_has_smartmips)
0125 seq_puts(m, " smartmips");
0126 if (cpu_has_dsp)
0127 seq_puts(m, " dsp");
0128 if (cpu_has_dsp2)
0129 seq_puts(m, " dsp2");
0130 if (cpu_has_dsp3)
0131 seq_puts(m, " dsp3");
0132 if (cpu_has_mipsmt)
0133 seq_puts(m, " mt");
0134 if (cpu_has_mmips)
0135 seq_puts(m, " micromips");
0136 if (cpu_has_vz)
0137 seq_puts(m, " vz");
0138 if (cpu_has_msa)
0139 seq_puts(m, " msa");
0140 if (cpu_has_eva)
0141 seq_puts(m, " eva");
0142 if (cpu_has_htw)
0143 seq_puts(m, " htw");
0144 if (cpu_has_xpa)
0145 seq_puts(m, " xpa");
0146 if (cpu_has_loongson_mmi)
0147 seq_puts(m, " loongson-mmi");
0148 if (cpu_has_loongson_cam)
0149 seq_puts(m, " loongson-cam");
0150 if (cpu_has_loongson_ext)
0151 seq_puts(m, " loongson-ext");
0152 if (cpu_has_loongson_ext2)
0153 seq_puts(m, " loongson-ext2");
0154 seq_puts(m, "\n");
0155
0156 if (cpu_has_mmips) {
0157 seq_printf(m, "micromips kernel\t: %s\n",
0158 (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no");
0159 }
0160
0161 seq_puts(m, "Options implemented\t:");
0162 if (cpu_has_tlb)
0163 seq_puts(m, " tlb");
0164 if (cpu_has_ftlb)
0165 seq_puts(m, " ftlb");
0166 if (cpu_has_tlbinv)
0167 seq_puts(m, " tlbinv");
0168 if (cpu_has_segments)
0169 seq_puts(m, " segments");
0170 if (cpu_has_rixiex)
0171 seq_puts(m, " rixiex");
0172 if (cpu_has_ldpte)
0173 seq_puts(m, " ldpte");
0174 if (cpu_has_maar)
0175 seq_puts(m, " maar");
0176 if (cpu_has_rw_llb)
0177 seq_puts(m, " rw_llb");
0178 if (cpu_has_4kex)
0179 seq_puts(m, " 4kex");
0180 if (cpu_has_3k_cache)
0181 seq_puts(m, " 3k_cache");
0182 if (cpu_has_4k_cache)
0183 seq_puts(m, " 4k_cache");
0184 if (cpu_has_octeon_cache)
0185 seq_puts(m, " octeon_cache");
0186 if (raw_cpu_has_fpu)
0187 seq_puts(m, " fpu");
0188 if (cpu_has_32fpr)
0189 seq_puts(m, " 32fpr");
0190 if (cpu_has_cache_cdex_p)
0191 seq_puts(m, " cache_cdex_p");
0192 if (cpu_has_cache_cdex_s)
0193 seq_puts(m, " cache_cdex_s");
0194 if (cpu_has_prefetch)
0195 seq_puts(m, " prefetch");
0196 if (cpu_has_mcheck)
0197 seq_puts(m, " mcheck");
0198 if (cpu_has_ejtag)
0199 seq_puts(m, " ejtag");
0200 if (cpu_has_llsc)
0201 seq_puts(m, " llsc");
0202 if (cpu_has_guestctl0ext)
0203 seq_puts(m, " guestctl0ext");
0204 if (cpu_has_guestctl1)
0205 seq_puts(m, " guestctl1");
0206 if (cpu_has_guestctl2)
0207 seq_puts(m, " guestctl2");
0208 if (cpu_has_guestid)
0209 seq_puts(m, " guestid");
0210 if (cpu_has_drg)
0211 seq_puts(m, " drg");
0212 if (cpu_has_rixi)
0213 seq_puts(m, " rixi");
0214 if (cpu_has_lpa)
0215 seq_puts(m, " lpa");
0216 if (cpu_has_mvh)
0217 seq_puts(m, " mvh");
0218 if (cpu_has_vtag_icache)
0219 seq_puts(m, " vtag_icache");
0220 if (cpu_has_dc_aliases)
0221 seq_puts(m, " dc_aliases");
0222 if (cpu_has_ic_fills_f_dc)
0223 seq_puts(m, " ic_fills_f_dc");
0224 if (cpu_has_pindexed_dcache)
0225 seq_puts(m, " pindexed_dcache");
0226 if (cpu_has_userlocal)
0227 seq_puts(m, " userlocal");
0228 if (cpu_has_nofpuex)
0229 seq_puts(m, " nofpuex");
0230 if (cpu_has_vint)
0231 seq_puts(m, " vint");
0232 if (cpu_has_veic)
0233 seq_puts(m, " veic");
0234 if (cpu_has_inclusive_pcaches)
0235 seq_puts(m, " inclusive_pcaches");
0236 if (cpu_has_perf_cntr_intr_bit)
0237 seq_puts(m, " perf_cntr_intr_bit");
0238 if (cpu_has_ufr)
0239 seq_puts(m, " ufr");
0240 if (cpu_has_fre)
0241 seq_puts(m, " fre");
0242 if (cpu_has_cdmm)
0243 seq_puts(m, " cdmm");
0244 if (cpu_has_small_pages)
0245 seq_puts(m, " small_pages");
0246 if (cpu_has_nan_legacy)
0247 seq_puts(m, " nan_legacy");
0248 if (cpu_has_nan_2008)
0249 seq_puts(m, " nan_2008");
0250 if (cpu_has_ebase_wg)
0251 seq_puts(m, " ebase_wg");
0252 if (cpu_has_badinstr)
0253 seq_puts(m, " badinstr");
0254 if (cpu_has_badinstrp)
0255 seq_puts(m, " badinstrp");
0256 if (cpu_has_contextconfig)
0257 seq_puts(m, " contextconfig");
0258 if (cpu_has_perf)
0259 seq_puts(m, " perf");
0260 if (cpu_has_mac2008_only)
0261 seq_puts(m, " mac2008_only");
0262 if (cpu_has_ftlbparex)
0263 seq_puts(m, " ftlbparex");
0264 if (cpu_has_gsexcex)
0265 seq_puts(m, " gsexcex");
0266 if (cpu_has_shared_ftlb_ram)
0267 seq_puts(m, " shared_ftlb_ram");
0268 if (cpu_has_shared_ftlb_entries)
0269 seq_puts(m, " shared_ftlb_entries");
0270 if (cpu_has_mipsmt_pertccounters)
0271 seq_puts(m, " mipsmt_pertccounters");
0272 if (cpu_has_mmid)
0273 seq_puts(m, " mmid");
0274 if (cpu_has_mm_sysad)
0275 seq_puts(m, " mm_sysad");
0276 if (cpu_has_mm_full)
0277 seq_puts(m, " mm_full");
0278 seq_puts(m, "\n");
0279
0280 seq_printf(m, "shadow register sets\t: %d\n",
0281 cpu_data[n].srsets);
0282 seq_printf(m, "kscratch registers\t: %d\n",
0283 hweight8(cpu_data[n].kscratch_mask));
0284 seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package);
0285 seq_printf(m, "core\t\t\t: %d\n", cpu_core(&cpu_data[n]));
0286
0287 #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
0288 if (cpu_has_mipsmt)
0289 seq_printf(m, "VPE\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
0290 else if (cpu_has_vp)
0291 seq_printf(m, "VP\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
0292 #endif
0293
0294 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
0295 cpu_has_vce ? "%u" : "not available");
0296 seq_printf(m, fmt, 'D', vced_count);
0297 seq_printf(m, fmt, 'I', vcei_count);
0298
0299 proc_cpuinfo_notifier_args.m = m;
0300 proc_cpuinfo_notifier_args.n = n;
0301
0302 raw_notifier_call_chain(&proc_cpuinfo_chain, 0,
0303 &proc_cpuinfo_notifier_args);
0304
0305 seq_puts(m, "\n");
0306
0307 return 0;
0308 }
0309
0310 static void *c_start(struct seq_file *m, loff_t *pos)
0311 {
0312 unsigned long i = *pos;
0313
0314 return i < nr_cpu_ids ? (void *) (i + 1) : NULL;
0315 }
0316
0317 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
0318 {
0319 ++*pos;
0320 return c_start(m, pos);
0321 }
0322
0323 static void c_stop(struct seq_file *m, void *v)
0324 {
0325 }
0326
0327 const struct seq_operations cpuinfo_op = {
0328 .start = c_start,
0329 .next = c_next,
0330 .stop = c_stop,
0331 .show = show_cpuinfo,
0332 };
