mips/kernel/csrc-ioasic.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  DEC I/O ASIC's counter clocksource
0004  *
0005  *  Copyright (C) 2008  Yoichi Yuasa <yuasa@linux-mips.org>
0006  */
0007 #include <linux/clocksource.h>
0008 #include <linux/sched_clock.h>
0009 #include <linux/init.h>
0010
0011 #include <asm/ds1287.h>
0012 #include <asm/time.h>
0013 #include <asm/dec/ioasic.h>
0014 #include <asm/dec/ioasic_addrs.h>
0015
0016 static u64 dec_ioasic_hpt_read(struct clocksource *cs)
0017 {
0018     return ioasic_read(IO_REG_FCTR);
0019 }
0020
0021 static struct clocksource clocksource_dec = {
0022     .name       = "dec-ioasic",
0023     .read       = dec_ioasic_hpt_read,
0024     .mask       = CLOCKSOURCE_MASK(32),
0025     .flags      = CLOCK_SOURCE_IS_CONTINUOUS,
0026 };
0027
0028 static u64 notrace dec_ioasic_read_sched_clock(void)
0029 {
0030     return ioasic_read(IO_REG_FCTR);
0031 }
0032
0033 int __init dec_ioasic_clocksource_init(void)
0034 {
0035     unsigned int freq;
0036     u32 start, end;
0037     int i = HZ / 8;
0038
0039     ds1287_timer_state();
0040     while (!ds1287_timer_state())
0041         ;
0042
0043     start = dec_ioasic_hpt_read(&clocksource_dec);
0044
0045     while (i--)
0046         while (!ds1287_timer_state())
0047             ;
0048
0049     end = dec_ioasic_hpt_read(&clocksource_dec);
0050
0051     freq = (end - start) * 8;
0052
0053     /* An early revision of the I/O ASIC didn't have the counter.  */
0054     if (!freq)
0055         return -ENXIO;
0056
0057     printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq);
0058
0059     clocksource_dec.rating = 200 + freq / 10000000;
0060     clocksource_register_hz(&clocksource_dec, freq);
0061
0062     sched_clock_register(dec_ioasic_read_sched_clock, 32, freq);
0063
0064     return 0;
0065 }