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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2020 ARM Ltd.
0004  */
0005 #ifndef __ASM_VDSO_PROCESSOR_H
0006 #define __ASM_VDSO_PROCESSOR_H
0007 
0008 #ifndef __ASSEMBLY__
0009 
0010 #ifdef CONFIG_CPU_LOONGSON64
0011 /*
0012  * Loongson-3's SFB (Store-Fill-Buffer) may buffer writes indefinitely when a
0013  * tight read loop is executed, because reads take priority over writes & the
0014  * hardware (incorrectly) doesn't ensure that writes will eventually occur.
0015  *
0016  * Since spin loops of any kind should have a cpu_relax() in them, force an SFB
0017  * flush from cpu_relax() such that any pending writes will become visible as
0018  * expected.
0019  */
0020 #define cpu_relax() smp_mb()
0021 #else
0022 #define cpu_relax() barrier()
0023 #endif
0024 
0025 #endif /* __ASSEMBLY__ */
0026 
0027 #endif /* __ASM_VDSO_PROCESSOR_H */