include/asm/txx9tmr.h

0001 /*
0002  * include/asm-mips/txx9tmr.h
0003  * TX39/TX49 timer controller definitions.
0004  *
0005  * This file is subject to the terms and conditions of the GNU General Public
0006  * License.  See the file "COPYING" in the main directory of this archive
0007  * for more details.
0008  */
0009 #ifndef __ASM_TXX9TMR_H
0010 #define __ASM_TXX9TMR_H
0011
0012 #include <linux/types.h>
0013
0014 struct txx9_tmr_reg {
0015     u32 tcr;
0016     u32 tisr;
0017     u32 cpra;
0018     u32 cprb;
0019     u32 itmr;
0020     u32 unused0[3];
0021     u32 ccdr;
0022     u32 unused1[3];
0023     u32 pgmr;
0024     u32 unused2[3];
0025     u32 wtmr;
0026     u32 unused3[43];
0027     u32 trr;
0028 };
0029
0030 /* TMTCR : Timer Control */
0031 #define TXx9_TMTCR_TCE      0x00000080
0032 #define TXx9_TMTCR_CCDE     0x00000040
0033 #define TXx9_TMTCR_CRE      0x00000020
0034 #define TXx9_TMTCR_ECES     0x00000008
0035 #define TXx9_TMTCR_CCS      0x00000004
0036 #define TXx9_TMTCR_TMODE_MASK   0x00000003
0037 #define TXx9_TMTCR_TMODE_ITVL   0x00000000
0038 #define TXx9_TMTCR_TMODE_PGEN   0x00000001
0039 #define TXx9_TMTCR_TMODE_WDOG   0x00000002
0040
0041 /* TMTISR : Timer Int. Status */
0042 #define TXx9_TMTISR_TPIBS   0x00000004
0043 #define TXx9_TMTISR_TPIAS   0x00000002
0044 #define TXx9_TMTISR_TIIS    0x00000001
0045
0046 /* TMITMR : Interval Timer Mode */
0047 #define TXx9_TMITMR_TIIE    0x00008000
0048 #define TXx9_TMITMR_TZCE    0x00000001
0049
0050 /* TMWTMR : Watchdog Timer Mode */
0051 #define TXx9_TMWTMR_TWIE    0x00008000
0052 #define TXx9_TMWTMR_WDIS    0x00000080
0053 #define TXx9_TMWTMR_TWC     0x00000001
0054
0055 void txx9_clocksource_init(unsigned long baseaddr,
0056                unsigned int imbusclk);
0057 void txx9_clockevent_init(unsigned long baseaddr, int irq,
0058               unsigned int imbusclk);
0059 void txx9_tmr_init(unsigned long baseaddr);
0060
0061 #define TXX9_TIMER_BITS 32
0062
0063 #endif /* __ASM_TXX9TMR_H */