asm/txx9/smsc_fdc37m81x.h

0001 /*
0002  * Interface for smsc fdc48m81x Super IO chip
0003  *
0004  * Author: MontaVista Software, Inc. source@mvista.com
0005  *
0006  * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
0007  * the terms of the GNU General Public License version 2. This program
0008  * is licensed "as is" without any warranty of any kind, whether express
0009  * or implied.
0010  *
0011  * Copyright (C) 2004 MontaVista Software Inc.
0012  * Manish Lachwani, mlachwani@mvista.com
0013  */
0014
0015 #ifndef _SMSC_FDC37M81X_H_
0016 #define _SMSC_FDC37M81X_H_
0017
0018 /* Common Registers */
0019 #define SMSC_FDC37M81X_CONFIG_INDEX  0x00
0020 #define SMSC_FDC37M81X_CONFIG_DATA   0x01
0021 #define SMSC_FDC37M81X_CONF      0x02
0022 #define SMSC_FDC37M81X_INDEX         0x03
0023 #define SMSC_FDC37M81X_DNUM      0x07
0024 #define SMSC_FDC37M81X_DID       0x20
0025 #define SMSC_FDC37M81X_DREV      0x21
0026 #define SMSC_FDC37M81X_PCNT      0x22
0027 #define SMSC_FDC37M81X_PMGT      0x23
0028 #define SMSC_FDC37M81X_OSC       0x24
0029 #define SMSC_FDC37M81X_CONFPA0       0x26
0030 #define SMSC_FDC37M81X_CONFPA1       0x27
0031 #define SMSC_FDC37M81X_TEST4         0x2B
0032 #define SMSC_FDC37M81X_TEST5         0x2C
0033 #define SMSC_FDC37M81X_TEST1         0x2D
0034 #define SMSC_FDC37M81X_TEST2         0x2E
0035 #define SMSC_FDC37M81X_TEST3         0x2F
0036
0037 /* Logical device numbers */
0038 #define SMSC_FDC37M81X_FDD       0x00
0039 #define SMSC_FDC37M81X_PARALLEL      0x03
0040 #define SMSC_FDC37M81X_SERIAL1       0x04
0041 #define SMSC_FDC37M81X_SERIAL2       0x05
0042 #define SMSC_FDC37M81X_KBD       0x07
0043 #define SMSC_FDC37M81X_AUXIO         0x08
0044 #define SMSC_FDC37M81X_NONE      0xff
0045
0046 /* Logical device Config Registers */
0047 #define SMSC_FDC37M81X_ACTIVE        0x30
0048 #define SMSC_FDC37M81X_BASEADDR0     0x60
0049 #define SMSC_FDC37M81X_BASEADDR1     0x61
0050 #define SMSC_FDC37M81X_INT       0x70
0051 #define SMSC_FDC37M81X_INT2      0x72
0052 #define SMSC_FDC37M81X_LDCR_F0       0xF0
0053
0054 /* Chip Config Values */
0055 #define SMSC_FDC37M81X_CONFIG_ENTER  0x55
0056 #define SMSC_FDC37M81X_CONFIG_EXIT   0xaa
0057 #define SMSC_FDC37M81X_CHIP_ID       0x4d
0058
0059 unsigned long smsc_fdc37m81x_init(unsigned long port);
0060
0061 void smsc_fdc37m81x_config_beg(void);
0062
0063 void smsc_fdc37m81x_config_end(void);
0064
0065 u8 smsc_fdc37m81x_config_get(u8 reg);
0066 void smsc_fdc37m81x_config_set(u8 reg, u8 val);
0067
0068 #endif