asm/txx9/dmac.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * TXx9 SoC DMA Controller
0004  */
0005
0006 #ifndef __ASM_TXX9_DMAC_H
0007 #define __ASM_TXX9_DMAC_H
0008
0009 #include <linux/dmaengine.h>
0010
0011 #define TXX9_DMA_MAX_NR_CHANNELS    4
0012
0013 /**
0014  * struct txx9dmac_platform_data - Controller configuration parameters
0015  * @memcpy_chan: Channel used for DMA_MEMCPY
0016  * @have_64bit_regs: DMAC have 64 bit registers
0017  */
0018 struct txx9dmac_platform_data {
0019     int memcpy_chan;
0020     bool    have_64bit_regs;
0021 };
0022
0023 /**
0024  * struct txx9dmac_chan_platform_data - Channel configuration parameters
0025  * @dmac_dev: A platform device for DMAC
0026  */
0027 struct txx9dmac_chan_platform_data {
0028     struct platform_device *dmac_dev;
0029 };
0030
0031 /**
0032  * struct txx9dmac_slave - Controller-specific information about a slave
0033  * @tx_reg: physical address of data register used for
0034  *  memory-to-peripheral transfers
0035  * @rx_reg: physical address of data register used for
0036  *  peripheral-to-memory transfers
0037  * @reg_width: peripheral register width
0038  */
0039 struct txx9dmac_slave {
0040     u64     tx_reg;
0041     u64     rx_reg;
0042     unsigned int    reg_width;
0043 };
0044
0045 void txx9_dmac_init(int id, unsigned long baseaddr, int irq,
0046             const struct txx9dmac_platform_data *pdata);
0047
0048 #endif /* __ASM_TXX9_DMAC_H */