include/asm/timex.h

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 1998, 1999, 2003 by Ralf Baechle
0007  * Copyright (C) 2014 by Maciej W. Rozycki
0008  */
0009 #ifndef _ASM_TIMEX_H
0010 #define _ASM_TIMEX_H
0011
0012 #ifdef __KERNEL__
0013
0014 #include <linux/compiler.h>
0015
0016 #include <asm/cpu.h>
0017 #include <asm/cpu-features.h>
0018 #include <asm/mipsregs.h>
0019 #include <asm/cpu-type.h>
0020
0021 /*
0022  * This is the clock rate of the i8253 PIT.  A MIPS system may not have
0023  * a PIT by the symbol is used all over the kernel including some APIs.
0024  * So keeping it defined to the number for the PIT is the only sane thing
0025  * for now.
0026  */
0027 #define CLOCK_TICK_RATE 1193182
0028
0029 /*
0030  * Standard way to access the cycle counter.
0031  * Currently only used on SMP for scheduling.
0032  *
0033  * Only the low 32 bits are available as a continuously counting entity.
0034  * But this only means we'll force a reschedule every 8 seconds or so,
0035  * which isn't an evil thing.
0036  *
0037  * We know that all SMP capable CPUs have cycle counters.
0038  */
0039
0040 typedef unsigned int cycles_t;
0041
0042 /*
0043  * On R4000/R4400 an erratum exists such that if the cycle counter is
0044  * read in the exact moment that it is matching the compare register,
0045  * no interrupt will be generated.
0046  *
0047  * There is a suggested workaround and also the erratum can't strike if
0048  * the compare interrupt isn't being used as the clock source device.
0049  * However for now the implementaton of this function doesn't get these
0050  * fine details right.
0051  */
0052 static inline int can_use_mips_counter(unsigned int prid)
0053 {
0054     int comp = (prid & PRID_COMP_MASK) != PRID_COMP_LEGACY;
0055
0056     if (__builtin_constant_p(cpu_has_counter) && !cpu_has_counter)
0057         return 0;
0058     else if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r)
0059         return 1;
0060     else if (likely(!__builtin_constant_p(cpu_has_mips_r) && comp))
0061         return 1;
0062     /* Make sure we don't peek at cpu_data[0].options in the fast path! */
0063     if (!__builtin_constant_p(cpu_has_counter))
0064         asm volatile("" : "=m" (cpu_data[0].options));
0065     if (likely(cpu_has_counter &&
0066            prid > (PRID_IMP_R4000 | PRID_REV_ENCODE_44(15, 15))))
0067         return 1;
0068     else
0069         return 0;
0070 }
0071
0072 static inline cycles_t get_cycles(void)
0073 {
0074     if (can_use_mips_counter(read_c0_prid()))
0075         return read_c0_count();
0076     else
0077         return 0;   /* no usable counter */
0078 }
0079 #define get_cycles get_cycles
0080
0081 /*
0082  * Like get_cycles - but where c0_count is not available we desperately
0083  * use c0_random in an attempt to get at least a little bit of entropy.
0084  */
0085 static inline unsigned long random_get_entropy(void)
0086 {
0087     unsigned int c0_random;
0088
0089     if (can_use_mips_counter(read_c0_prid()))
0090         return read_c0_count();
0091
0092     if (cpu_has_3kex)
0093         c0_random = (read_c0_random() >> 8) & 0x3f;
0094     else
0095         c0_random = read_c0_random() & 0x3f;
0096     return (random_get_entropy_fallback() << 6) | (0x3f - c0_random);
0097 }
0098 #define random_get_entropy random_get_entropy
0099
0100 #endif /* __KERNEL__ */
0101
0102 #endif /*  _ASM_TIMEX_H */