sn/sn0/addrs.h

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Derived from IRIX <sys/SN/SN0/addrs.h>, revision 1.126.
0007  *
0008  * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
0009  * Copyright (C) 1999 by Ralf Baechle
0010  */
0011 #ifndef _ASM_SN_SN0_ADDRS_H
0012 #define _ASM_SN_SN0_ADDRS_H
0013
0014
0015 /*
0016  * SN0 (on a T5) Address map
0017  *
0018  * This file contains a set of definitions and macros which are used
0019  * to reference into the major address spaces (CAC, HSPEC, IO, MSPEC,
0020  * and UNCAC) used by the SN0 architecture.  It also contains addresses
0021  * for "major" statically locatable PROM/Kernel data structures, such as
0022  * the partition table, the configuration data structure, etc.
0023  * We make an implicit assumption that the processor using this file
0024  * follows the R10K's provisions for specifying uncached attributes;
0025  * should this change, the base registers may very well become processor-
0026  * dependent.
0027  *
0028  * For more information on the address spaces, see the "Local Resources"
0029  * chapter of the Hub specification.
0030  *
0031  * NOTE: This header file is included both by C and by assembler source
0032  *   files.  Please bracket any language-dependent definitions
0033  *   appropriately.
0034  */
0035
0036 /*
0037  * Some of the macros here need to be casted to appropriate types when used
0038  * from C.  They definitely must not be casted from assembly language so we
0039  * use some new ANSI preprocessor stuff to paste these on where needed.
0040  */
0041
0042 /*
0043  * The following couple of definitions will eventually need to be variables,
0044  * since the amount of address space assigned to each node depends on
0045  * whether the system is running in N-mode (more nodes with less memory)
0046  * or M-mode (fewer nodes with more memory).  We expect that it will
0047  * be a while before we need to make this decision dynamically, though,
0048  * so for now we just use defines bracketed by an ifdef.
0049  */
0050
0051 #ifdef CONFIG_SGI_SN_N_MODE
0052
0053 #define NODE_SIZE_BITS      31
0054 #define BWIN_SIZE_BITS      28
0055
0056 #define NASID_BITS      9
0057 #define NASID_BITMASK       (0x1ffLL)
0058 #define NASID_SHFT      31
0059 #define NASID_META_BITS     5
0060 #define NASID_LOCAL_BITS    4
0061
0062 #define BDDIR_UPPER_MASK    (UINT64_CAST 0x7ffff << 10)
0063 #define BDECC_UPPER_MASK    (UINT64_CAST 0x3ffffff << 3)
0064
0065 #else /* !defined(CONFIG_SGI_SN_N_MODE), assume that M-mode is desired */
0066
0067 #define NODE_SIZE_BITS      32
0068 #define BWIN_SIZE_BITS      29
0069
0070 #define NASID_BITMASK       (0xffLL)
0071 #define NASID_BITS      8
0072 #define NASID_SHFT      32
0073 #define NASID_META_BITS     4
0074 #define NASID_LOCAL_BITS    4
0075
0076 #define BDDIR_UPPER_MASK    (UINT64_CAST 0xfffff << 10)
0077 #define BDECC_UPPER_MASK    (UINT64_CAST 0x7ffffff << 3)
0078
0079 #endif /* !defined(CONFIG_SGI_SN_N_MODE) */
0080
0081 #define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS)
0082
0083 #define NASID_MASK      (UINT64_CAST NASID_BITMASK << NASID_SHFT)
0084 #define NASID_GET(_pa)      (int) ((UINT64_CAST (_pa) >>        \
0085                     NASID_SHFT) & NASID_BITMASK)
0086
0087 #if !defined(__ASSEMBLY__)
0088
0089 #define NODE_SWIN_BASE(nasid, widget)                   \
0090     ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN)      \
0091     : RAW_NODE_SWIN_BASE(nasid, widget))
0092 #else /* __ASSEMBLY__ */
0093 #define NODE_SWIN_BASE(nasid, widget) \
0094      (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
0095 #endif /* __ASSEMBLY__ */
0096
0097 /*
0098  * The following definitions pertain to the IO special address
0099  * space.  They define the location of the big and little windows
0100  * of any given node.
0101  */
0102
0103 #define BWIN_INDEX_BITS     3
0104 #define BWIN_SIZE       (UINT64_CAST 1 << BWIN_SIZE_BITS)
0105 #define BWIN_SIZEMASK       (BWIN_SIZE - 1)
0106 #define BWIN_WIDGET_MASK    0x7
0107 #define NODE_BWIN_BASE0(nasid)  (NODE_IO_BASE(nasid) + BWIN_SIZE)
0108 #define NODE_BWIN_BASE(nasid, bigwin)   (NODE_BWIN_BASE0(nasid) +   \
0109             (UINT64_CAST(bigwin) << BWIN_SIZE_BITS))
0110
0111 #define BWIN_WIDGETADDR(addr)   ((addr) & BWIN_SIZEMASK)
0112 #define BWIN_WINDOWNUM(addr)    (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
0113 /*
0114  * Verify if addr belongs to large window address of node with "nasid"
0115  *
0116  *
0117  * NOTE: "addr" is expected to be XKPHYS address, and NOT physical
0118  * address
0119  *
0120  *
0121  */
0122
0123 #define NODE_BWIN_ADDR(nasid, addr) \
0124         (((addr) >= NODE_BWIN_BASE0(nasid)) && \
0125          ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + \
0126                 BWIN_SIZE)))
0127
0128 /*
0129  * The following define the major position-independent aliases used
0130  * in SN0.
0131  *  CALIAS -- Varies in size, points to the first n bytes of memory
0132  *          on the reader's node.
0133  */
0134
0135 #define CALIAS_BASE     CAC_BASE
0136
0137 #define SN0_WIDGET_BASE(_nasid, _wid)   (NODE_SWIN_BASE((_nasid), (_wid)))
0138
0139 /* Turn on sable logging for the processors whose bits are set. */
0140 #define SABLE_LOG_TRIGGER(_map)
0141
0142 #ifndef __ASSEMBLY__
0143 #define KERN_NMI_ADDR(nasid, slice)                 \
0144             TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET +  \
0145                   (IP27_NMI_KREGS_CPU_SIZE * (slice)))
0146 #endif /* !__ASSEMBLY__ */
0147
0148 #ifdef PROM
0149
0150 #define MISC_PROM_BASE      PHYS_TO_K0(0x01300000)
0151 #define MISC_PROM_SIZE      0x200000
0152
0153 #define DIAG_BASE       PHYS_TO_K0(0x01500000)
0154 #define DIAG_SIZE       0x300000
0155
0156 #define ROUTE_BASE      PHYS_TO_K0(0x01800000)
0157 #define ROUTE_SIZE      0x200000
0158
0159 #define IP27PROM_FLASH_HDR  PHYS_TO_K0(0x01300000)
0160 #define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000)
0161 #define IP27PROM_CORP_MAX   32
0162 #define IP27PROM_CORP       PHYS_TO_K0(0x01800000)
0163 #define IP27PROM_CORP_SIZE  0x10000
0164 #define IP27PROM_CORP_STK   PHYS_TO_K0(0x01810000)
0165 #define IP27PROM_CORP_STKSIZE   0x2000
0166 #define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000)
0167 #define IP27PROM_DECOMP_SIZE    0xfff00
0168
0169 #define IP27PROM_BASE       PHYS_TO_K0(0x01a00000)
0170 #define IP27PROM_BASE_MAPPED    (UNCAC_BASE | 0x1fc00000)
0171 #define IP27PROM_SIZE_MAX   0x100000
0172
0173 #define IP27PROM_PCFG       PHYS_TO_K0(0x01b00000)
0174 #define IP27PROM_PCFG_SIZE  0xd0000
0175 #define IP27PROM_ERRDMP     PHYS_TO_K1(0x01bd0000)
0176 #define IP27PROM_ERRDMP_SIZE    0xf000
0177
0178 #define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000)
0179 #define IP27PROM_CONSOLE    PHYS_TO_K1(0x01bdf000)
0180 #define IP27PROM_CONSOLE_SIZE   0x200
0181 #define IP27PROM_NETUART    PHYS_TO_K1(0x01bdf200)
0182 #define IP27PROM_NETUART_SIZE   0x100
0183 #define IP27PROM_UNUSED1    PHYS_TO_K1(0x01bdf300)
0184 #define IP27PROM_UNUSED1_SIZE   0x500
0185 #define IP27PROM_ELSC_BASE_A    PHYS_TO_K0(0x01bdf800)
0186 #define IP27PROM_ELSC_BASE_B    PHYS_TO_K0(0x01bdfc00)
0187 #define IP27PROM_STACK_A    PHYS_TO_K0(0x01be0000)
0188 #define IP27PROM_STACK_B    PHYS_TO_K0(0x01bf0000)
0189 #define IP27PROM_STACK_SHFT 16
0190 #define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT)
0191 #define IP27PROM_INIT_END   PHYS_TO_K0(0x01c00000)
0192
0193 #define SLAVESTACK_BASE     PHYS_TO_K0(0x01580000)
0194 #define SLAVESTACK_SIZE     0x40000
0195
0196 #define ENETBUFS_BASE       PHYS_TO_K0(0x01f80000)
0197 #define ENETBUFS_SIZE       0x20000
0198
0199 #define IO6PROM_BASE        PHYS_TO_K0(0x01c00000)
0200 #define IO6PROM_SIZE        0x400000
0201 #define IO6PROM_BASE_MAPPED (UNCAC_BASE | 0x11c00000)
0202 #define IO6DPROM_BASE       PHYS_TO_K0(0x01c00000)
0203 #define IO6DPROM_SIZE       0x200000
0204
0205 #define NODEBUGUNIX_ADDR    PHYS_TO_K0(0x00019000)
0206 #define DEBUGUNIX_ADDR      PHYS_TO_K0(0x00100000)
0207
0208 #define IP27PROM_INT_LAUNCH 10  /* and 11 */
0209 #define IP27PROM_INT_NETUART    12  /* through 17 */
0210
0211 #endif /* PROM */
0212
0213 /*
0214  * needed by symmon so it needs to be outside #if PROM
0215  */
0216 #define IP27PROM_ELSC_SHFT  10
0217 #define IP27PROM_ELSC_SIZE  (1 << IP27PROM_ELSC_SHFT)
0218
0219 /*
0220  * This address is used by IO6PROM to build MemoryDescriptors of
0221  * free memory. This address is important since unix gets loaded
0222  * at this address, and this memory has to be FREE if unix is to
0223  * be loaded.
0224  */
0225
0226 #define FREEMEM_BASE        PHYS_TO_K0(0x2000000)
0227
0228 #define IO6PROM_STACK_SHFT  14  /* stack per cpu */
0229 #define IO6PROM_STACK_SIZE  (1 << IO6PROM_STACK_SHFT)
0230
0231 /*
0232  * IP27 PROM vectors
0233  */
0234
0235 #define IP27PROM_ENTRY      PHYS_TO_COMPATK1(0x1fc00000)
0236 #define IP27PROM_RESTART    PHYS_TO_COMPATK1(0x1fc00008)
0237 #define IP27PROM_SLAVELOOP  PHYS_TO_COMPATK1(0x1fc00010)
0238 #define IP27PROM_PODMODE    PHYS_TO_COMPATK1(0x1fc00018)
0239 #define IP27PROM_IOC3UARTPOD    PHYS_TO_COMPATK1(0x1fc00020)
0240 #define IP27PROM_FLASHLEDS  PHYS_TO_COMPATK1(0x1fc00028)
0241 #define IP27PROM_REPOD      PHYS_TO_COMPATK1(0x1fc00030)
0242 #define IP27PROM_LAUNCHSLAVE    PHYS_TO_COMPATK1(0x1fc00038)
0243 #define IP27PROM_WAITSLAVE  PHYS_TO_COMPATK1(0x1fc00040)
0244 #define IP27PROM_POLLSLAVE  PHYS_TO_COMPATK1(0x1fc00048)
0245
0246 #define KL_UART_BASE    LOCAL_HUB_ADDR(MD_UREG0_0)  /* base of UART regs */
0247 #define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0)  /* UART command reg */
0248 #define KL_UART_DATA    LOCAL_HUB_ADDR(MD_UREG0_1)  /* UART data reg */
0249 #define KL_I2C_REG  MD_UREG0_0          /* I2C reg */
0250
0251 #ifndef __ASSEMBLY__
0252
0253 /* Address 0x400 to 0x1000 ualias points to cache error eframe + misc
0254  * CACHE_ERR_SP_PTR could either contain an address to the stack, or
0255  * the stack could start at CACHE_ERR_SP_PTR
0256  */
0257 #if defined(HUB_ERR_STS_WAR)
0258 #define CACHE_ERR_EFRAME    0x480
0259 #else /* HUB_ERR_STS_WAR */
0260 #define CACHE_ERR_EFRAME    0x400
0261 #endif /* HUB_ERR_STS_WAR */
0262
0263 #define CACHE_ERR_ECCFRAME  (CACHE_ERR_EFRAME + EF_SIZE)
0264 #define CACHE_ERR_SP_PTR    (0x1000 - 32)   /* why -32? TBD */
0265 #define CACHE_ERR_IBASE_PTR (0x1000 - 40)
0266 #define CACHE_ERR_SP        (CACHE_ERR_SP_PTR - 16)
0267 #define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME)
0268
0269 #endif  /* !__ASSEMBLY__ */
0270
0271 #define _ARCSPROM
0272
0273 #if defined(HUB_ERR_STS_WAR)
0274
0275 #define ERR_STS_WAR_REGISTER    IIO_IIBUSERR
0276 #define ERR_STS_WAR_ADDR    LOCAL_HUB_ADDR(IIO_IIBUSERR)
0277 #define ERR_STS_WAR_PHYSADDR    TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR)
0278                 /* Used to match addr in error reg. */
0279 #define OLD_ERR_STS_WAR_OFFSET  ((MD_MEM_BANKS * MD_BANK_SIZE) - 0x100)
0280
0281 #endif /* HUB_ERR_STS_WAR */
0282
0283 #endif /* _ASM_SN_SN0_ADDRS_H */