asm/sn/nmi.h

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Derived from IRIX <sys/SN/nmi.h>, Revision 1.5.
0007  *
0008  * Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
0009  */
0010 #ifndef __ASM_SN_NMI_H
0011 #define __ASM_SN_NMI_H
0012
0013 #include <asm/sn/addrs.h>
0014
0015 /*
0016  * The launch data structure resides at a fixed place in each node's memory
0017  * and is used to communicate between the master processor and the slave
0018  * processors.
0019  *
0020  * The master stores launch parameters in the launch structure
0021  * corresponding to a target processor that is in a slave loop, then sends
0022  * an interrupt to the slave processor.  The slave calls the desired
0023  * function, followed by an optional rendezvous function, then returns to
0024  * the slave loop.  The master does not wait for the slaves before
0025  * returning.
0026  *
0027  * There is an array of launch structures, one per CPU on the node.  One
0028  * interrupt level is used per CPU.
0029  */
0030
0031 #define NMI_MAGIC       0x48414d4d455201
0032 #define NMI_SIZEOF      0x40
0033
0034 #define NMI_OFF_MAGIC       0x00    /* Struct offsets for assembly      */
0035 #define NMI_OFF_FLAGS       0x08
0036 #define NMI_OFF_CALL        0x10
0037 #define NMI_OFF_CALLC       0x18
0038 #define NMI_OFF_CALLPARM    0x20
0039 #define NMI_OFF_GMASTER     0x28
0040
0041 /*
0042  * The NMI routine is called only if the complement address is
0043  * correct.
0044  *
0045  * Before control is transferred to a routine, the complement address
0046  * is zeroed (invalidated) to prevent an accidental call from a spurious
0047  * interrupt.
0048  *
0049  */
0050
0051 #ifndef __ASSEMBLY__
0052
0053 typedef struct nmi_s {
0054     volatile unsigned long   magic;     /* Magic number */
0055     volatile unsigned long   flags;     /* Combination of flags above */
0056     volatile void *call_addr;   /* Routine for slave to call        */
0057     volatile void *call_addr_c; /* 1's complement of address        */
0058     volatile void *call_parm;   /* Single parm passed to call       */
0059     volatile unsigned long   gmaster;   /* Flag true only on global master*/
0060 } nmi_t;
0061
0062 #endif /* !__ASSEMBLY__ */
0063
0064 /* Following definitions are needed both in the prom & the kernel
0065  * to identify the format of the nmi cpu register save area in the
0066  * low memory on each node.
0067  */
0068 #ifndef __ASSEMBLY__
0069
0070 struct reg_struct {
0071     unsigned long   gpr[32];
0072     unsigned long   sr;
0073     unsigned long   cause;
0074     unsigned long   epc;
0075     unsigned long   badva;
0076     unsigned long   error_epc;
0077     unsigned long   cache_err;
0078     unsigned long   nmi_sr;
0079 };
0080
0081 #endif /* !__ASSEMBLY__ */
0082
0083 /* These are the assembly language offsets into the reg_struct structure */
0084
0085 #define R0_OFF      0x0
0086 #define R1_OFF      0x8
0087 #define R2_OFF      0x10
0088 #define R3_OFF      0x18
0089 #define R4_OFF      0x20
0090 #define R5_OFF      0x28
0091 #define R6_OFF      0x30
0092 #define R7_OFF      0x38
0093 #define R8_OFF      0x40
0094 #define R9_OFF      0x48
0095 #define R10_OFF     0x50
0096 #define R11_OFF     0x58
0097 #define R12_OFF     0x60
0098 #define R13_OFF     0x68
0099 #define R14_OFF     0x70
0100 #define R15_OFF     0x78
0101 #define R16_OFF     0x80
0102 #define R17_OFF     0x88
0103 #define R18_OFF     0x90
0104 #define R19_OFF     0x98
0105 #define R20_OFF     0xa0
0106 #define R21_OFF     0xa8
0107 #define R22_OFF     0xb0
0108 #define R23_OFF     0xb8
0109 #define R24_OFF     0xc0
0110 #define R25_OFF     0xc8
0111 #define R26_OFF     0xd0
0112 #define R27_OFF     0xd8
0113 #define R28_OFF     0xe0
0114 #define R29_OFF     0xe8
0115 #define R30_OFF     0xf0
0116 #define R31_OFF     0xf8
0117 #define SR_OFF      0x100
0118 #define CAUSE_OFF   0x108
0119 #define EPC_OFF     0x110
0120 #define BADVA_OFF   0x118
0121 #define ERROR_EPC_OFF   0x120
0122 #define CACHE_ERR_OFF   0x128
0123 #define NMISR_OFF   0x130
0124
0125 #endif /* __ASM_SN_NMI_H */