asm/sibyte/sb1250_defs.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*  *********************************************************************
0003     *  SB1250 Board Support Package
0004     *
0005     *  Global constants and macros      File: sb1250_defs.h
0006     *
0007     *  This file contains macros and definitions used by the other
0008     *  include files.
0009     *
0010     *  SB1250 specification level:  User's manual 1/02/02
0011     *
0012     *********************************************************************
0013     *
0014     *  Copyright 2000,2001,2002,2003
0015     *  Broadcom Corporation. All rights reserved.
0016     *
0017     ********************************************************************* */
0018
0019 #ifndef _SB1250_DEFS_H
0020 #define _SB1250_DEFS_H
0021
0022 /*
0023  * These headers require ANSI C89 string concatenation, and GCC or other
0024  * 'long long' (64-bit integer) support.
0025  */
0026 #if !defined(__STDC__) && !defined(_MSC_VER)
0027 #error SiByte headers require ANSI C89 support
0028 #endif
0029
0030
0031 /*  *********************************************************************
0032     *  Macros for feature tests, used to enable include file features
0033     *  for chip features only present in certain chip revisions.
0034     *
0035     *  SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
0036     *  which is to be exposed by the headers.  If undefined, it defaults to
0037     *  "all features."
0038     *
0039     *  Use like:
0040     *
0041     *    #define SIBYTE_HDR_FEATURES    SIBYTE_HDR_FMASK_112x_PASS1
0042     *
0043     *       Generate defines only for that revision of chip.
0044     *
0045     *    #if SIBYTE_HDR_FEATURE(chip,pass)
0046     *
0047     *       True if header features for that revision or later of
0048     *       that particular chip type are enabled in SIBYTE_HDR_FEATURES.
0049     *       (Use this to bracket #defines for features present in a given
0050     *       revision and later.)
0051     *
0052     *       Note that there is no implied ordering between chip types.
0053     *
0054     *       Note also that 'chip' and 'pass' must textually exactly
0055     *       match the defines below.  So, for example,
0056     *       SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
0057     *       SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
0058     *
0059     *    #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
0060     *
0061     *       Same as SIBYTE_HDR_FEATURE, but true for the named revision
0062     *       and earlier revisions of the named chip type.
0063     *
0064     *    #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
0065     *
0066     *       Same as SIBYTE_HDR_FEATURE, but only true for the named
0067     *       revision of the named chip type.  (Note that this CANNOT
0068     *       be used to verify that you're compiling only for that
0069     *       particular chip/revision.  It will be true any time this
0070     *       chip/revision is included in SIBYTE_HDR_FEATURES.)
0071     *
0072     *    #if SIBYTE_HDR_FEATURE_CHIP(chip)
0073     *
0074     *       True if header features for (any revision of) that chip type
0075     *       are enabled in SIBYTE_HDR_FEATURES.  (Use this to bracket
0076     *       #defines for features specific to a given chip type.)
0077     *
0078     *  Mask values currently include room for additional revisions of each
0079     *  chip type, but can be renumbered at will.  Note that they MUST fit
0080     *  into 31 bits and may not include C type constructs, for safe use in
0081     *  CPP conditionals.  Bit positions within chip types DO indicate
0082     *  ordering, so be careful when adding support for new minor revs.
0083     ********************************************************************* */
0084
0085 #define SIBYTE_HDR_FMASK_1250_ALL       0x000000ff
0086 #define SIBYTE_HDR_FMASK_1250_PASS1     0x00000001
0087 #define SIBYTE_HDR_FMASK_1250_PASS2     0x00000002
0088 #define SIBYTE_HDR_FMASK_1250_PASS3     0x00000004
0089
0090 #define SIBYTE_HDR_FMASK_112x_ALL       0x00000f00
0091 #define SIBYTE_HDR_FMASK_112x_PASS1     0x00000100
0092
0093 #define SIBYTE_HDR_FMASK_1480_ALL       0x0000f000
0094 #define SIBYTE_HDR_FMASK_1480_PASS1     0x00001000
0095 #define SIBYTE_HDR_FMASK_1480_PASS2     0x00002000
0096
0097 /* Bit mask for chip/revision.  (use _ALL for all revisions of a chip).  */
0098 #define SIBYTE_HDR_FMASK(chip, pass)                    \
0099     (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
0100 #define SIBYTE_HDR_FMASK_ALLREVS(chip)                  \
0101     (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
0102
0103 /* Default constant value for all chips, all revisions */
0104 #define SIBYTE_HDR_FMASK_ALL                        \
0105     (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL      \
0106      | SIBYTE_HDR_FMASK_1480_ALL)
0107
0108 /* This one is used for the "original" BCM1250/BCM112x chips.  We use this
0109    to weed out constants and macros that do not exist on later chips like
0110    the BCM1480  */
0111 #define SIBYTE_HDR_FMASK_1250_112x_ALL                  \
0112     (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
0113 #define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL
0114
0115 #ifndef SIBYTE_HDR_FEATURES
0116 #define SIBYTE_HDR_FEATURES         SIBYTE_HDR_FMASK_ALL
0117 #endif
0118
0119
0120 /* Bit mask for revisions of chip exclusively before the named revision.  */
0121 #define SIBYTE_HDR_FMASK_BEFORE(chip, pass)             \
0122     ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
0123
0124 /* Bit mask for revisions of chip exclusively after the named revision.  */
0125 #define SIBYTE_HDR_FMASK_AFTER(chip, pass)              \
0126     (~(SIBYTE_HDR_FMASK(chip, pass)                 \
0127      | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
0128
0129
0130 /* True if header features enabled for (any revision of) that chip type.  */
0131 #define SIBYTE_HDR_FEATURE_CHIP(chip)                   \
0132     (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
0133
0134 /* True for all versions of the BCM1250 and BCM1125, but not true for
0135    anything else */
0136 #define SIBYTE_HDR_FEATURE_1250_112x \
0137       (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
0138 /*    (!!  (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */
0139
0140 /* True if header features enabled for that rev or later, inclusive.  */
0141 #define SIBYTE_HDR_FEATURE(chip, pass)                  \
0142     (!! ((SIBYTE_HDR_FMASK(chip, pass)                  \
0143       | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
0144
0145 /* True if header features enabled for exactly that rev.  */
0146 #define SIBYTE_HDR_FEATURE_EXACT(chip, pass)                \
0147     (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
0148
0149 /* True if header features enabled for that rev or before, inclusive.  */
0150 #define SIBYTE_HDR_FEATURE_UP_TO(chip, pass)                \
0151     (!! ((SIBYTE_HDR_FMASK(chip, pass)                  \
0152      | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
0153
0154
0155 /*  *********************************************************************
0156     *  Naming schemes for constants in these files:
0157     *
0158     *  M_xxx           MASK constant (identifies bits in a register).
0159     *              For multi-bit fields, all bits in the field will
0160     *              be set.
0161     *
0162     *  K_xxx           "Code" constant (value for data in a multi-bit
0163     *              field).  The value is right justified.
0164     *
0165     *  V_xxx           "Value" constant.  This is the same as the
0166     *              corresponding "K_xxx" constant, except it is
0167     *              shifted to the correct position in the register.
0168     *
0169     *  S_xxx           SHIFT constant.  This is the number of bits that
0170     *              a field value (code) needs to be shifted
0171     *              (towards the left) to put the value in the right
0172     *              position for the register.
0173     *
0174     *  A_xxx           ADDRESS constant.  This will be a physical
0175     *              address.  Use the PHYS_TO_K1 macro to generate
0176     *              a K1SEG address.
0177     *
0178     *  R_xxx           RELATIVE offset constant.  This is an offset from
0179     *              an A_xxx constant (usually the first register in
0180     *              a group).
0181     *
0182     *  G_xxx(X)        GET value.  This macro obtains a multi-bit field
0183     *              from a register, masks it, and shifts it to
0184     *              the bottom of the register (retrieving a K_xxx
0185     *              value, for example).
0186     *
0187     *  V_xxx(X)        VALUE.  This macro computes the value of a
0188     *              K_xxx constant shifted to the correct position
0189     *              in the register.
0190     ********************************************************************* */
0191
0192
0193
0194
0195 /*
0196  * Cast to 64-bit number.  Presumably the syntax is different in
0197  * assembly language.
0198  *
0199  * Note: you'll need to define uint32_t and uint64_t in your headers.
0200  */
0201
0202 #if !defined(__ASSEMBLY__)
0203 #define _SB_MAKE64(x) ((uint64_t)(x))
0204 #define _SB_MAKE32(x) ((uint32_t)(x))
0205 #else
0206 #define _SB_MAKE64(x) (x)
0207 #define _SB_MAKE32(x) (x)
0208 #endif
0209
0210
0211 /*
0212  * Make a mask for 1 bit at position 'n'
0213  */
0214
0215 #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
0216 #define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
0217
0218 /*
0219  * Make a mask for 'v' bits at position 'n'
0220  */
0221
0222 #define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
0223 #define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
0224
0225 /*
0226  * Make a value at 'v' at bit position 'n'
0227  */
0228
0229 #define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n))
0230 #define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n))
0231
0232 #define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
0233 #define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
0234
0235 /*
0236  * Macros to read/write on-chip registers
0237  * XXX should we do the PHYS_TO_K1 here?
0238  */
0239
0240
0241 #if defined(__mips64) && !defined(__ASSEMBLY__)
0242 #define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
0243 #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
0244 #endif /* __ASSEMBLY__ */
0245
0246 #endif