Back to home page

OSCL-LXR
 
 

     

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 2003 Ralf Baechle
0007  */
0008 #ifndef _ASM_PGTABLE_H
0009 #define _ASM_PGTABLE_H
0010 
0011 #include <linux/mm_types.h>
0012 #include <linux/mmzone.h>
0013 #ifdef CONFIG_32BIT
0014 #include <asm/pgtable-32.h>
0015 #endif
0016 #ifdef CONFIG_64BIT
0017 #include <asm/pgtable-64.h>
0018 #endif
0019 
0020 #include <asm/cmpxchg.h>
0021 #include <asm/io.h>
0022 #include <asm/pgtable-bits.h>
0023 #include <asm/cpu-features.h>
0024 
0025 struct mm_struct;
0026 struct vm_area_struct;
0027 
0028 #define PAGE_SHARED vm_get_page_prot(VM_READ|VM_WRITE|VM_SHARED)
0029 
0030 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
0031                  _PAGE_GLOBAL | _page_cachable_default)
0032 #define PAGE_KERNEL_NC  __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
0033                  _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
0034 #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
0035             __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
0036 
0037 /*
0038  * If _PAGE_NO_EXEC is not defined, we can't do page protection for
0039  * execute, and consider it to be the same as read. Also, write
0040  * permissions imply read permissions. This is the closest we can get
0041  * by reasonable means..
0042  */
0043 
0044 extern unsigned long _page_cachable_default;
0045 extern void __update_cache(unsigned long address, pte_t pte);
0046 
0047 /*
0048  * ZERO_PAGE is a global shared page that is always zero; used
0049  * for zero-mapped memory areas etc..
0050  */
0051 
0052 extern unsigned long empty_zero_page;
0053 extern unsigned long zero_page_mask;
0054 
0055 #define ZERO_PAGE(vaddr) \
0056     (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
0057 #define __HAVE_COLOR_ZERO_PAGE
0058 
0059 extern void paging_init(void);
0060 
0061 /*
0062  * Conversion functions: convert a page and protection to a page entry,
0063  * and a page entry and page directory to the page they refer to.
0064  */
0065 #define pmd_phys(pmd)       virt_to_phys((void *)pmd_val(pmd))
0066 
0067 static inline unsigned long pmd_pfn(pmd_t pmd)
0068 {
0069     return pmd_val(pmd) >> _PFN_SHIFT;
0070 }
0071 
0072 #ifndef CONFIG_MIPS_HUGE_TLB_SUPPORT
0073 #define pmd_page(pmd)       (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
0074 #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
0075 
0076 #define pmd_page_vaddr(pmd) pmd_val(pmd)
0077 
0078 #define htw_stop()                          \
0079 do {                                    \
0080     unsigned long __flags;                      \
0081                                     \
0082     if (cpu_has_htw) {                      \
0083         local_irq_save(__flags);                \
0084         if(!raw_current_cpu_data.htw_seq++) {           \
0085             write_c0_pwctl(read_c0_pwctl() &        \
0086                        ~(1 << MIPS_PWCTL_PWEN_SHIFT));  \
0087             back_to_back_c0_hazard();           \
0088         }                           \
0089         local_irq_restore(__flags);             \
0090     }                               \
0091 } while(0)
0092 
0093 #define htw_start()                         \
0094 do {                                    \
0095     unsigned long __flags;                      \
0096                                     \
0097     if (cpu_has_htw) {                      \
0098         local_irq_save(__flags);                \
0099         if (!--raw_current_cpu_data.htw_seq) {          \
0100             write_c0_pwctl(read_c0_pwctl() |        \
0101                        (1 << MIPS_PWCTL_PWEN_SHIFT));   \
0102             back_to_back_c0_hazard();           \
0103         }                           \
0104         local_irq_restore(__flags);             \
0105     }                               \
0106 } while(0)
0107 
0108 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
0109                   pte_t *ptep, pte_t pteval);
0110 
0111 #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
0112 
0113 #ifdef CONFIG_XPA
0114 # define pte_none(pte)      (!(((pte).pte_high) & ~_PAGE_GLOBAL))
0115 #else
0116 # define pte_none(pte)      (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
0117 #endif
0118 
0119 #define pte_present(pte)    ((pte).pte_low & _PAGE_PRESENT)
0120 #define pte_no_exec(pte)    ((pte).pte_low & _PAGE_NO_EXEC)
0121 
0122 static inline void set_pte(pte_t *ptep, pte_t pte)
0123 {
0124     ptep->pte_high = pte.pte_high;
0125     smp_wmb();
0126     ptep->pte_low = pte.pte_low;
0127 
0128 #ifdef CONFIG_XPA
0129     if (pte.pte_high & _PAGE_GLOBAL) {
0130 #else
0131     if (pte.pte_low & _PAGE_GLOBAL) {
0132 #endif
0133         pte_t *buddy = ptep_buddy(ptep);
0134         /*
0135          * Make sure the buddy is global too (if it's !none,
0136          * it better already be global)
0137          */
0138         if (pte_none(*buddy)) {
0139             if (!IS_ENABLED(CONFIG_XPA))
0140                 buddy->pte_low |= _PAGE_GLOBAL;
0141             buddy->pte_high |= _PAGE_GLOBAL;
0142         }
0143     }
0144 }
0145 
0146 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
0147 {
0148     pte_t null = __pte(0);
0149 
0150     htw_stop();
0151     /* Preserve global status for the pair */
0152     if (IS_ENABLED(CONFIG_XPA)) {
0153         if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
0154             null.pte_high = _PAGE_GLOBAL;
0155     } else {
0156         if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
0157             null.pte_low = null.pte_high = _PAGE_GLOBAL;
0158     }
0159 
0160     set_pte_at(mm, addr, ptep, null);
0161     htw_start();
0162 }
0163 #else
0164 
0165 #define pte_none(pte)       (!(pte_val(pte) & ~_PAGE_GLOBAL))
0166 #define pte_present(pte)    (pte_val(pte) & _PAGE_PRESENT)
0167 #define pte_no_exec(pte)    (pte_val(pte) & _PAGE_NO_EXEC)
0168 
0169 /*
0170  * Certain architectures need to do special things when pte's
0171  * within a page table are directly modified.  Thus, the following
0172  * hook is made available.
0173  */
0174 static inline void set_pte(pte_t *ptep, pte_t pteval)
0175 {
0176     *ptep = pteval;
0177 #if !defined(CONFIG_CPU_R3K_TLB)
0178     if (pte_val(pteval) & _PAGE_GLOBAL) {
0179         pte_t *buddy = ptep_buddy(ptep);
0180         /*
0181          * Make sure the buddy is global too (if it's !none,
0182          * it better already be global)
0183          */
0184 # if defined(CONFIG_PHYS_ADDR_T_64BIT) && !defined(CONFIG_CPU_MIPS32)
0185         cmpxchg64(&buddy->pte, 0, _PAGE_GLOBAL);
0186 # else
0187         cmpxchg(&buddy->pte, 0, _PAGE_GLOBAL);
0188 # endif
0189     }
0190 #endif
0191 }
0192 
0193 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
0194 {
0195     htw_stop();
0196 #if !defined(CONFIG_CPU_R3K_TLB)
0197     /* Preserve global status for the pair */
0198     if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
0199         set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
0200     else
0201 #endif
0202         set_pte_at(mm, addr, ptep, __pte(0));
0203     htw_start();
0204 }
0205 #endif
0206 
0207 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
0208                   pte_t *ptep, pte_t pteval)
0209 {
0210 
0211     if (!pte_present(pteval))
0212         goto cache_sync_done;
0213 
0214     if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))
0215         goto cache_sync_done;
0216 
0217     __update_cache(addr, pteval);
0218 cache_sync_done:
0219     set_pte(ptep, pteval);
0220 }
0221 
0222 /*
0223  * (pmds are folded into puds so this doesn't get actually called,
0224  * but the define is needed for a generic inline function.)
0225  */
0226 #define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
0227 
0228 #ifndef __PAGETABLE_PMD_FOLDED
0229 /*
0230  * (puds are folded into pgds so this doesn't get actually called,
0231  * but the define is needed for a generic inline function.)
0232  */
0233 #define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
0234 #endif
0235 
0236 #define PGD_T_LOG2  (__builtin_ffs(sizeof(pgd_t)) - 1)
0237 #define PMD_T_LOG2  (__builtin_ffs(sizeof(pmd_t)) - 1)
0238 #define PTE_T_LOG2  (__builtin_ffs(sizeof(pte_t)) - 1)
0239 
0240 /*
0241  * We used to declare this array with size but gcc 3.3 and older are not able
0242  * to find that this expression is a constant, so the size is dropped.
0243  */
0244 extern pgd_t swapper_pg_dir[];
0245 
0246 /*
0247  * Platform specific pte_special() and pte_mkspecial() definitions
0248  * are required only when ARCH_HAS_PTE_SPECIAL is enabled.
0249  */
0250 #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
0251 #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
0252 static inline int pte_special(pte_t pte)
0253 {
0254     return pte.pte_low & _PAGE_SPECIAL;
0255 }
0256 
0257 static inline pte_t pte_mkspecial(pte_t pte)
0258 {
0259     pte.pte_low |= _PAGE_SPECIAL;
0260     return pte;
0261 }
0262 #else
0263 static inline int pte_special(pte_t pte)
0264 {
0265     return pte_val(pte) & _PAGE_SPECIAL;
0266 }
0267 
0268 static inline pte_t pte_mkspecial(pte_t pte)
0269 {
0270     pte_val(pte) |= _PAGE_SPECIAL;
0271     return pte;
0272 }
0273 #endif
0274 #endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
0275 
0276 /*
0277  * The following only work if pte_present() is true.
0278  * Undefined behaviour if not..
0279  */
0280 #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
0281 static inline int pte_write(pte_t pte)  { return pte.pte_low & _PAGE_WRITE; }
0282 static inline int pte_dirty(pte_t pte)  { return pte.pte_low & _PAGE_MODIFIED; }
0283 static inline int pte_young(pte_t pte)  { return pte.pte_low & _PAGE_ACCESSED; }
0284 
0285 static inline pte_t pte_wrprotect(pte_t pte)
0286 {
0287     pte.pte_low  &= ~_PAGE_WRITE;
0288     if (!IS_ENABLED(CONFIG_XPA))
0289         pte.pte_low &= ~_PAGE_SILENT_WRITE;
0290     pte.pte_high &= ~_PAGE_SILENT_WRITE;
0291     return pte;
0292 }
0293 
0294 static inline pte_t pte_mkclean(pte_t pte)
0295 {
0296     pte.pte_low  &= ~_PAGE_MODIFIED;
0297     if (!IS_ENABLED(CONFIG_XPA))
0298         pte.pte_low &= ~_PAGE_SILENT_WRITE;
0299     pte.pte_high &= ~_PAGE_SILENT_WRITE;
0300     return pte;
0301 }
0302 
0303 static inline pte_t pte_mkold(pte_t pte)
0304 {
0305     pte.pte_low  &= ~_PAGE_ACCESSED;
0306     if (!IS_ENABLED(CONFIG_XPA))
0307         pte.pte_low &= ~_PAGE_SILENT_READ;
0308     pte.pte_high &= ~_PAGE_SILENT_READ;
0309     return pte;
0310 }
0311 
0312 static inline pte_t pte_mkwrite(pte_t pte)
0313 {
0314     pte.pte_low |= _PAGE_WRITE;
0315     if (pte.pte_low & _PAGE_MODIFIED) {
0316         if (!IS_ENABLED(CONFIG_XPA))
0317             pte.pte_low |= _PAGE_SILENT_WRITE;
0318         pte.pte_high |= _PAGE_SILENT_WRITE;
0319     }
0320     return pte;
0321 }
0322 
0323 static inline pte_t pte_mkdirty(pte_t pte)
0324 {
0325     pte.pte_low |= _PAGE_MODIFIED;
0326     if (pte.pte_low & _PAGE_WRITE) {
0327         if (!IS_ENABLED(CONFIG_XPA))
0328             pte.pte_low |= _PAGE_SILENT_WRITE;
0329         pte.pte_high |= _PAGE_SILENT_WRITE;
0330     }
0331     return pte;
0332 }
0333 
0334 static inline pte_t pte_mkyoung(pte_t pte)
0335 {
0336     pte.pte_low |= _PAGE_ACCESSED;
0337     if (!(pte.pte_low & _PAGE_NO_READ)) {
0338         if (!IS_ENABLED(CONFIG_XPA))
0339             pte.pte_low |= _PAGE_SILENT_READ;
0340         pte.pte_high |= _PAGE_SILENT_READ;
0341     }
0342     return pte;
0343 }
0344 #else
0345 static inline int pte_write(pte_t pte)  { return pte_val(pte) & _PAGE_WRITE; }
0346 static inline int pte_dirty(pte_t pte)  { return pte_val(pte) & _PAGE_MODIFIED; }
0347 static inline int pte_young(pte_t pte)  { return pte_val(pte) & _PAGE_ACCESSED; }
0348 
0349 static inline pte_t pte_wrprotect(pte_t pte)
0350 {
0351     pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
0352     return pte;
0353 }
0354 
0355 static inline pte_t pte_mkclean(pte_t pte)
0356 {
0357     pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
0358     return pte;
0359 }
0360 
0361 static inline pte_t pte_mkold(pte_t pte)
0362 {
0363     pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
0364     return pte;
0365 }
0366 
0367 static inline pte_t pte_mkwrite(pte_t pte)
0368 {
0369     pte_val(pte) |= _PAGE_WRITE;
0370     if (pte_val(pte) & _PAGE_MODIFIED)
0371         pte_val(pte) |= _PAGE_SILENT_WRITE;
0372     return pte;
0373 }
0374 
0375 static inline pte_t pte_mkdirty(pte_t pte)
0376 {
0377     pte_val(pte) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
0378     if (pte_val(pte) & _PAGE_WRITE)
0379         pte_val(pte) |= _PAGE_SILENT_WRITE;
0380     return pte;
0381 }
0382 
0383 static inline pte_t pte_mkyoung(pte_t pte)
0384 {
0385     pte_val(pte) |= _PAGE_ACCESSED;
0386     if (!(pte_val(pte) & _PAGE_NO_READ))
0387         pte_val(pte) |= _PAGE_SILENT_READ;
0388     return pte;
0389 }
0390 
0391 #define pte_sw_mkyoung  pte_mkyoung
0392 
0393 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
0394 static inline int pte_huge(pte_t pte)   { return pte_val(pte) & _PAGE_HUGE; }
0395 
0396 static inline pte_t pte_mkhuge(pte_t pte)
0397 {
0398     pte_val(pte) |= _PAGE_HUGE;
0399     return pte;
0400 }
0401 
0402 #define pmd_write pmd_write
0403 static inline int pmd_write(pmd_t pmd)
0404 {
0405     return !!(pmd_val(pmd) & _PAGE_WRITE);
0406 }
0407 
0408 static inline struct page *pmd_page(pmd_t pmd)
0409 {
0410     if (pmd_val(pmd) & _PAGE_HUGE)
0411         return pfn_to_page(pmd_pfn(pmd));
0412 
0413     return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
0414 }
0415 #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
0416 
0417 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0418 static inline bool pte_soft_dirty(pte_t pte)
0419 {
0420     return pte_val(pte) & _PAGE_SOFT_DIRTY;
0421 }
0422 #define pte_swp_soft_dirty pte_soft_dirty
0423 
0424 static inline pte_t pte_mksoft_dirty(pte_t pte)
0425 {
0426     pte_val(pte) |= _PAGE_SOFT_DIRTY;
0427     return pte;
0428 }
0429 #define pte_swp_mksoft_dirty pte_mksoft_dirty
0430 
0431 static inline pte_t pte_clear_soft_dirty(pte_t pte)
0432 {
0433     pte_val(pte) &= ~(_PAGE_SOFT_DIRTY);
0434     return pte;
0435 }
0436 #define pte_swp_clear_soft_dirty pte_clear_soft_dirty
0437 
0438 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
0439 
0440 #endif
0441 
0442 /*
0443  * Macro to make mark a page protection value as "uncacheable".  Note
0444  * that "protection" is really a misnomer here as the protection value
0445  * contains the memory attribute bits, dirty bits, and various other
0446  * bits as well.
0447  */
0448 #define pgprot_noncached pgprot_noncached
0449 
0450 static inline pgprot_t pgprot_noncached(pgprot_t _prot)
0451 {
0452     unsigned long prot = pgprot_val(_prot);
0453 
0454     prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
0455 
0456     return __pgprot(prot);
0457 }
0458 
0459 #define pgprot_writecombine pgprot_writecombine
0460 
0461 static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
0462 {
0463     unsigned long prot = pgprot_val(_prot);
0464 
0465     /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
0466     prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
0467 
0468     return __pgprot(prot);
0469 }
0470 
0471 static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma,
0472                         unsigned long address)
0473 {
0474 }
0475 
0476 #define __HAVE_ARCH_PTE_SAME
0477 static inline int pte_same(pte_t pte_a, pte_t pte_b)
0478 {
0479     return pte_val(pte_a) == pte_val(pte_b);
0480 }
0481 
0482 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
0483 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
0484                     unsigned long address, pte_t *ptep,
0485                     pte_t entry, int dirty)
0486 {
0487     if (!pte_same(*ptep, entry))
0488         set_pte_at(vma->vm_mm, address, ptep, entry);
0489     /*
0490      * update_mmu_cache will unconditionally execute, handling both
0491      * the case that the PTE changed and the spurious fault case.
0492      */
0493     return true;
0494 }
0495 
0496 /*
0497  * Conversion functions: convert a page and protection to a page entry,
0498  * and a page entry and page directory to the page they refer to.
0499  */
0500 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
0501 
0502 #if defined(CONFIG_XPA)
0503 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
0504 {
0505     pte.pte_low  &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
0506     pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
0507     pte.pte_low  |= pgprot_val(newprot) & ~_PFNX_MASK;
0508     pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
0509     return pte;
0510 }
0511 #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
0512 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
0513 {
0514     pte.pte_low  &= _PAGE_CHG_MASK;
0515     pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
0516     pte.pte_low  |= pgprot_val(newprot);
0517     pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
0518     return pte;
0519 }
0520 #else
0521 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
0522 {
0523     pte_val(pte) &= _PAGE_CHG_MASK;
0524     pte_val(pte) |= pgprot_val(newprot) & ~_PAGE_CHG_MASK;
0525     if ((pte_val(pte) & _PAGE_ACCESSED) && !(pte_val(pte) & _PAGE_NO_READ))
0526         pte_val(pte) |= _PAGE_SILENT_READ;
0527     return pte;
0528 }
0529 #endif
0530 
0531 
0532 extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
0533     pte_t pte);
0534 
0535 static inline void update_mmu_cache(struct vm_area_struct *vma,
0536     unsigned long address, pte_t *ptep)
0537 {
0538     pte_t pte = *ptep;
0539     __update_tlb(vma, address, pte);
0540 }
0541 
0542 #define __HAVE_ARCH_UPDATE_MMU_TLB
0543 #define update_mmu_tlb  update_mmu_cache
0544 
0545 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
0546     unsigned long address, pmd_t *pmdp)
0547 {
0548     pte_t pte = *(pte_t *)pmdp;
0549 
0550     __update_tlb(vma, address, pte);
0551 }
0552 
0553 #define kern_addr_valid(addr)   (1)
0554 
0555 /*
0556  * Allow physical addresses to be fixed up to help 36-bit peripherals.
0557  */
0558 #ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR
0559 phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size);
0560 int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr,
0561         unsigned long pfn, unsigned long size, pgprot_t prot);
0562 #define io_remap_pfn_range io_remap_pfn_range
0563 #else
0564 #define fixup_bigphys_addr(addr, size)  (addr)
0565 #endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */
0566 
0567 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
0568 
0569 /* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
0570 #define pmdp_establish generic_pmdp_establish
0571 
0572 #define has_transparent_hugepage has_transparent_hugepage
0573 extern int has_transparent_hugepage(void);
0574 
0575 static inline int pmd_trans_huge(pmd_t pmd)
0576 {
0577     return !!(pmd_val(pmd) & _PAGE_HUGE);
0578 }
0579 
0580 static inline pmd_t pmd_mkhuge(pmd_t pmd)
0581 {
0582     pmd_val(pmd) |= _PAGE_HUGE;
0583 
0584     return pmd;
0585 }
0586 
0587 extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
0588                pmd_t *pmdp, pmd_t pmd);
0589 
0590 static inline pmd_t pmd_wrprotect(pmd_t pmd)
0591 {
0592     pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
0593     return pmd;
0594 }
0595 
0596 static inline pmd_t pmd_mkwrite(pmd_t pmd)
0597 {
0598     pmd_val(pmd) |= _PAGE_WRITE;
0599     if (pmd_val(pmd) & _PAGE_MODIFIED)
0600         pmd_val(pmd) |= _PAGE_SILENT_WRITE;
0601 
0602     return pmd;
0603 }
0604 
0605 static inline int pmd_dirty(pmd_t pmd)
0606 {
0607     return !!(pmd_val(pmd) & _PAGE_MODIFIED);
0608 }
0609 
0610 static inline pmd_t pmd_mkclean(pmd_t pmd)
0611 {
0612     pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
0613     return pmd;
0614 }
0615 
0616 static inline pmd_t pmd_mkdirty(pmd_t pmd)
0617 {
0618     pmd_val(pmd) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
0619     if (pmd_val(pmd) & _PAGE_WRITE)
0620         pmd_val(pmd) |= _PAGE_SILENT_WRITE;
0621 
0622     return pmd;
0623 }
0624 
0625 static inline int pmd_young(pmd_t pmd)
0626 {
0627     return !!(pmd_val(pmd) & _PAGE_ACCESSED);
0628 }
0629 
0630 static inline pmd_t pmd_mkold(pmd_t pmd)
0631 {
0632     pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
0633 
0634     return pmd;
0635 }
0636 
0637 static inline pmd_t pmd_mkyoung(pmd_t pmd)
0638 {
0639     pmd_val(pmd) |= _PAGE_ACCESSED;
0640 
0641     if (!(pmd_val(pmd) & _PAGE_NO_READ))
0642         pmd_val(pmd) |= _PAGE_SILENT_READ;
0643 
0644     return pmd;
0645 }
0646 
0647 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0648 static inline int pmd_soft_dirty(pmd_t pmd)
0649 {
0650     return !!(pmd_val(pmd) & _PAGE_SOFT_DIRTY);
0651 }
0652 
0653 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
0654 {
0655     pmd_val(pmd) |= _PAGE_SOFT_DIRTY;
0656     return pmd;
0657 }
0658 
0659 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
0660 {
0661     pmd_val(pmd) &= ~(_PAGE_SOFT_DIRTY);
0662     return pmd;
0663 }
0664 
0665 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
0666 
0667 /* Extern to avoid header file madness */
0668 extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
0669 
0670 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
0671 {
0672     pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) |
0673                (pgprot_val(newprot) & ~_PAGE_CHG_MASK);
0674     return pmd;
0675 }
0676 
0677 static inline pmd_t pmd_mkinvalid(pmd_t pmd)
0678 {
0679     pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
0680 
0681     return pmd;
0682 }
0683 
0684 /*
0685  * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
0686  * different prototype.
0687  */
0688 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
0689 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
0690                         unsigned long address, pmd_t *pmdp)
0691 {
0692     pmd_t old = *pmdp;
0693 
0694     pmd_clear(pmdp);
0695 
0696     return old;
0697 }
0698 
0699 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
0700 
0701 #ifdef _PAGE_HUGE
0702 #define pmd_leaf(pmd)   ((pmd_val(pmd) & _PAGE_HUGE) != 0)
0703 #define pud_leaf(pud)   ((pud_val(pud) & _PAGE_HUGE) != 0)
0704 #endif
0705 
0706 #define gup_fast_permitted(start, end)  (!cpu_has_dc_aliases)
0707 
0708 /*
0709  * We provide our own get_unmapped area to cope with the virtual aliasing
0710  * constraints placed on us by the cache architecture.
0711  */
0712 #define HAVE_ARCH_UNMAPPED_AREA
0713 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
0714 
0715 #endif /* _ASM_PGTABLE_H */
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!