include/asm/pgtable-64.h

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
0007  * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
0008  */
0009 #ifndef _ASM_PGTABLE_64_H
0010 #define _ASM_PGTABLE_64_H
0011
0012 #include <linux/compiler.h>
0013 #include <linux/linkage.h>
0014
0015 #include <asm/addrspace.h>
0016 #include <asm/page.h>
0017 #include <asm/cachectl.h>
0018 #include <asm/fixmap.h>
0019
0020 #if CONFIG_PGTABLE_LEVELS == 2
0021 #include <asm-generic/pgtable-nopmd.h>
0022 #elif CONFIG_PGTABLE_LEVELS == 3
0023 #include <asm-generic/pgtable-nopud.h>
0024 #else
0025 #include <asm-generic/pgtable-nop4d.h>
0026 #endif
0027
0028 /*
0029  * Each address space has 2 4K pages as its page directory, giving 1024
0030  * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
0031  * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
0032  * tables. Each page table is also a single 4K page, giving 512 (==
0033  * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
0034  * invalid_pmd_table, each pmd entry is initialized to point to
0035  * invalid_pte_table, each pte is initialized to 0.
0036  *
0037  * Kernel mappings: kernel mappings are held in the swapper_pg_table.
0038  * The layout is identical to userspace except it's indexed with the
0039  * fault address - VMALLOC_START.
0040  */
0041
0042
0043 /* PGDIR_SHIFT determines what a third-level page table entry can map */
0044 #ifdef __PAGETABLE_PMD_FOLDED
0045 #define PGDIR_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
0046 #else
0047
0048 /* PMD_SHIFT determines the size of the area a second-level page table can map */
0049 #define PMD_SHIFT   (PAGE_SHIFT + (PAGE_SHIFT - 3))
0050 #define PMD_SIZE    (1UL << PMD_SHIFT)
0051 #define PMD_MASK    (~(PMD_SIZE-1))
0052
0053 # ifdef __PAGETABLE_PUD_FOLDED
0054 # define PGDIR_SHIFT    (PMD_SHIFT + (PAGE_SHIFT + PMD_TABLE_ORDER - 3))
0055 # endif
0056 #endif
0057
0058 #ifndef __PAGETABLE_PUD_FOLDED
0059 #define PUD_SHIFT   (PMD_SHIFT + (PAGE_SHIFT + PMD_TABLE_ORDER - 3))
0060 #define PUD_SIZE    (1UL << PUD_SHIFT)
0061 #define PUD_MASK    (~(PUD_SIZE-1))
0062 #define PGDIR_SHIFT (PUD_SHIFT + (PAGE_SHIFT + PUD_TABLE_ORDER - 3))
0063 #endif
0064
0065 #define PGDIR_SIZE  (1UL << PGDIR_SHIFT)
0066 #define PGDIR_MASK  (~(PGDIR_SIZE-1))
0067
0068 /*
0069  * For 4kB page size we use a 3 level page tree and an 8kB pud, which
0070  * permits us mapping 40 bits of virtual address space.
0071  *
0072  * We used to implement 41 bits by having an order 1 pmd level but that seemed
0073  * rather pointless.
0074  *
0075  * For 8kB page size we use a 3 level page tree which permits a total of
0076  * 8TB of address space.  Alternatively a 33-bit / 8GB organization using
0077  * two levels would be easy to implement.
0078  *
0079  * For 16kB page size we use a 2 level page tree which permits a total of
0080  * 36 bits of virtual address space.  We could add a third level but it seems
0081  * like at the moment there's no need for this.
0082  *
0083  * For 64kB page size we use a 2 level page table tree for a total of 42 bits
0084  * of virtual address space.
0085  */
0086 #ifdef CONFIG_PAGE_SIZE_4KB
0087 # ifdef CONFIG_MIPS_VA_BITS_48
0088 #  define PGD_TABLE_ORDER   0
0089 #  define PUD_TABLE_ORDER   0
0090 # else
0091 #  define PGD_TABLE_ORDER   1
0092 #  define PUD_TABLE_ORDER   aieeee_attempt_to_allocate_pud
0093 # endif
0094 #define PMD_TABLE_ORDER     0
0095 #endif
0096 #ifdef CONFIG_PAGE_SIZE_8KB
0097 #define PGD_TABLE_ORDER     0
0098 #define PUD_TABLE_ORDER     aieeee_attempt_to_allocate_pud
0099 #define PMD_TABLE_ORDER     0
0100 #endif
0101 #ifdef CONFIG_PAGE_SIZE_16KB
0102 #ifdef CONFIG_MIPS_VA_BITS_48
0103 #define PGD_TABLE_ORDER     1
0104 #else
0105 #define PGD_TABLE_ORDER     0
0106 #endif
0107 #define PUD_TABLE_ORDER     aieeee_attempt_to_allocate_pud
0108 #define PMD_TABLE_ORDER     0
0109 #endif
0110 #ifdef CONFIG_PAGE_SIZE_32KB
0111 #define PGD_TABLE_ORDER     0
0112 #define PUD_TABLE_ORDER     aieeee_attempt_to_allocate_pud
0113 #define PMD_TABLE_ORDER     0
0114 #endif
0115 #ifdef CONFIG_PAGE_SIZE_64KB
0116 #define PGD_TABLE_ORDER     0
0117 #define PUD_TABLE_ORDER     aieeee_attempt_to_allocate_pud
0118 #ifdef CONFIG_MIPS_VA_BITS_48
0119 #define PMD_TABLE_ORDER     0
0120 #else
0121 #define PMD_TABLE_ORDER     aieeee_attempt_to_allocate_pmd
0122 #endif
0123 #endif
0124
0125 #define PTRS_PER_PGD    ((PAGE_SIZE << PGD_TABLE_ORDER) / sizeof(pgd_t))
0126 #ifndef __PAGETABLE_PUD_FOLDED
0127 #define PTRS_PER_PUD    ((PAGE_SIZE << PUD_TABLE_ORDER) / sizeof(pud_t))
0128 #endif
0129 #ifndef __PAGETABLE_PMD_FOLDED
0130 #define PTRS_PER_PMD    ((PAGE_SIZE << PMD_TABLE_ORDER) / sizeof(pmd_t))
0131 #endif
0132 #define PTRS_PER_PTE    (PAGE_SIZE / sizeof(pte_t))
0133
0134 #define USER_PTRS_PER_PGD       ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)
0135
0136 /*
0137  * TLB refill handlers also map the vmalloc area into xuseg.  Avoid
0138  * the first couple of pages so NULL pointer dereferences will still
0139  * reliably trap.
0140  */
0141 #define VMALLOC_START       (MAP_BASE + (2 * PAGE_SIZE))
0142 #define VMALLOC_END \
0143     (MAP_BASE + \
0144      min(PTRS_PER_PGD * PTRS_PER_PUD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
0145          (1UL << cpu_vmbits)) - (1UL << 32))
0146
0147 #if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
0148     VMALLOC_START != CKSSEG
0149 /* Load modules into 32bit-compatible segment. */
0150 #define MODULE_START    CKSSEG
0151 #define MODULE_END  (FIXADDR_START-2*PAGE_SIZE)
0152 #endif
0153
0154 #define pte_ERROR(e) \
0155     printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
0156 #ifndef __PAGETABLE_PMD_FOLDED
0157 #define pmd_ERROR(e) \
0158     printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
0159 #endif
0160 #ifndef __PAGETABLE_PUD_FOLDED
0161 #define pud_ERROR(e) \
0162     printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e))
0163 #endif
0164 #define pgd_ERROR(e) \
0165     printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
0166
0167 extern pte_t invalid_pte_table[PTRS_PER_PTE];
0168
0169 #ifndef __PAGETABLE_PUD_FOLDED
0170 /*
0171  * For 4-level pagetables we defines these ourselves, for 3-level the
0172  * definitions are below, for 2-level the
0173  * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
0174  */
0175 typedef struct { unsigned long pud; } pud_t;
0176 #define pud_val(x)  ((x).pud)
0177 #define __pud(x)    ((pud_t) { (x) })
0178
0179 extern pud_t invalid_pud_table[PTRS_PER_PUD];
0180
0181 /*
0182  * Empty pgd entries point to the invalid_pud_table.
0183  */
0184 static inline int p4d_none(p4d_t p4d)
0185 {
0186     return p4d_val(p4d) == (unsigned long)invalid_pud_table;
0187 }
0188
0189 static inline int p4d_bad(p4d_t p4d)
0190 {
0191     if (unlikely(p4d_val(p4d) & ~PAGE_MASK))
0192         return 1;
0193
0194     return 0;
0195 }
0196
0197 static inline int p4d_present(p4d_t p4d)
0198 {
0199     return p4d_val(p4d) != (unsigned long)invalid_pud_table;
0200 }
0201
0202 static inline void p4d_clear(p4d_t *p4dp)
0203 {
0204     p4d_val(*p4dp) = (unsigned long)invalid_pud_table;
0205 }
0206
0207 static inline pud_t *p4d_pgtable(p4d_t p4d)
0208 {
0209     return (pud_t *)p4d_val(p4d);
0210 }
0211
0212 #define p4d_phys(p4d)       virt_to_phys((void *)p4d_val(p4d))
0213 #define p4d_page(p4d)       (pfn_to_page(p4d_phys(p4d) >> PAGE_SHIFT))
0214
0215 #define p4d_index(address)  (((address) >> P4D_SHIFT) & (PTRS_PER_P4D - 1))
0216
0217 static inline void set_p4d(p4d_t *p4d, p4d_t p4dval)
0218 {
0219     *p4d = p4dval;
0220 }
0221
0222 #endif
0223
0224 #ifndef __PAGETABLE_PMD_FOLDED
0225 /*
0226  * For 3-level pagetables we defines these ourselves, for 2-level the
0227  * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
0228  */
0229 typedef struct { unsigned long pmd; } pmd_t;
0230 #define pmd_val(x)  ((x).pmd)
0231 #define __pmd(x)    ((pmd_t) { (x) } )
0232
0233
0234 extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
0235 #endif
0236
0237 /*
0238  * Empty pgd/pmd entries point to the invalid_pte_table.
0239  */
0240 static inline int pmd_none(pmd_t pmd)
0241 {
0242     return pmd_val(pmd) == (unsigned long) invalid_pte_table;
0243 }
0244
0245 static inline int pmd_bad(pmd_t pmd)
0246 {
0247 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
0248     /* pmd_huge(pmd) but inline */
0249     if (unlikely(pmd_val(pmd) & _PAGE_HUGE))
0250         return 0;
0251 #endif
0252
0253     if (unlikely(pmd_val(pmd) & ~PAGE_MASK))
0254         return 1;
0255
0256     return 0;
0257 }
0258
0259 static inline int pmd_present(pmd_t pmd)
0260 {
0261 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
0262     if (unlikely(pmd_val(pmd) & _PAGE_HUGE))
0263         return pmd_val(pmd) & _PAGE_PRESENT;
0264 #endif
0265
0266     return pmd_val(pmd) != (unsigned long) invalid_pte_table;
0267 }
0268
0269 static inline void pmd_clear(pmd_t *pmdp)
0270 {
0271     pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
0272 }
0273 #ifndef __PAGETABLE_PMD_FOLDED
0274
0275 /*
0276  * Empty pud entries point to the invalid_pmd_table.
0277  */
0278 static inline int pud_none(pud_t pud)
0279 {
0280     return pud_val(pud) == (unsigned long) invalid_pmd_table;
0281 }
0282
0283 static inline int pud_bad(pud_t pud)
0284 {
0285     return pud_val(pud) & ~PAGE_MASK;
0286 }
0287
0288 static inline int pud_present(pud_t pud)
0289 {
0290     return pud_val(pud) != (unsigned long) invalid_pmd_table;
0291 }
0292
0293 static inline void pud_clear(pud_t *pudp)
0294 {
0295     pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
0296 }
0297 #endif
0298
0299 #define pte_page(x)     pfn_to_page(pte_pfn(x))
0300
0301 #define pte_pfn(x)      ((unsigned long)((x).pte >> _PFN_SHIFT))
0302 #define pfn_pte(pfn, prot)  __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
0303 #define pfn_pmd(pfn, prot)  __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
0304
0305 #ifndef __PAGETABLE_PMD_FOLDED
0306 static inline pmd_t *pud_pgtable(pud_t pud)
0307 {
0308     return (pmd_t *)pud_val(pud);
0309 }
0310 #define pud_phys(pud)       virt_to_phys((void *)pud_val(pud))
0311 #define pud_page(pud)       (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
0312
0313 #endif
0314
0315 /*
0316  * Initialize a new pgd / pmd table with invalid pointers.
0317  */
0318 extern void pgd_init(unsigned long page);
0319 extern void pud_init(unsigned long page, unsigned long pagetable);
0320 extern void pmd_init(unsigned long page, unsigned long pagetable);
0321
0322 /*
0323  * Non-present pages:  high 40 bits are offset, next 8 bits type,
0324  * low 16 bits zero.
0325  */
0326 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
0327 { pte_t pte; pte_val(pte) = (type << 16) | (offset << 24); return pte; }
0328
0329 #define __swp_type(x)       (((x).val >> 16) & 0xff)
0330 #define __swp_offset(x)     ((x).val >> 24)
0331 #define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) })
0332 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
0333 #define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
0334
0335 #endif /* _ASM_PGTABLE_64_H */