asm/octeon/cvmx-rnm-defs.h

0001 /***********************license start***************
0002  * Author: Cavium Networks
0003  *
0004  * Contact: support@caviumnetworks.com
0005  * This file is part of the OCTEON SDK
0006  *
0007  * Copyright (c) 2003-2012 Cavium Networks
0008  *
0009  * This file is free software; you can redistribute it and/or modify
0010  * it under the terms of the GNU General Public License, Version 2, as
0011  * published by the Free Software Foundation.
0012  *
0013  * This file is distributed in the hope that it will be useful, but
0014  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
0015  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
0016  * NONINFRINGEMENT.  See the GNU General Public License for more
0017  * details.
0018  *
0019  * You should have received a copy of the GNU General Public License
0020  * along with this file; if not, write to the Free Software
0021  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
0022  * or visit http://www.gnu.org/licenses/.
0023  *
0024  * This file may also be available under a different license from Cavium.
0025  * Contact Cavium Networks for more information
0026  ***********************license end**************************************/
0027
0028 #ifndef __CVMX_RNM_DEFS_H__
0029 #define __CVMX_RNM_DEFS_H__
0030
0031 #define CVMX_RNM_BIST_STATUS (CVMX_ADD_IO_SEG(0x0001180040000008ull))
0032 #define CVMX_RNM_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180040000000ull))
0033 #define CVMX_RNM_EER_DBG (CVMX_ADD_IO_SEG(0x0001180040000018ull))
0034 #define CVMX_RNM_EER_KEY (CVMX_ADD_IO_SEG(0x0001180040000010ull))
0035 #define CVMX_RNM_SERIAL_NUM (CVMX_ADD_IO_SEG(0x0001180040000020ull))
0036
0037 union cvmx_rnm_bist_status {
0038     uint64_t u64;
0039     struct cvmx_rnm_bist_status_s {
0040 #ifdef __BIG_ENDIAN_BITFIELD
0041         uint64_t reserved_2_63:62;
0042         uint64_t rrc:1;
0043         uint64_t mem:1;
0044 #else
0045         uint64_t mem:1;
0046         uint64_t rrc:1;
0047         uint64_t reserved_2_63:62;
0048 #endif
0049     } s;
0050 };
0051
0052 union cvmx_rnm_ctl_status {
0053     uint64_t u64;
0054     struct cvmx_rnm_ctl_status_s {
0055 #ifdef __BIG_ENDIAN_BITFIELD
0056         uint64_t reserved_12_63:52;
0057         uint64_t dis_mak:1;
0058         uint64_t eer_lck:1;
0059         uint64_t eer_val:1;
0060         uint64_t ent_sel:4;
0061         uint64_t exp_ent:1;
0062         uint64_t rng_rst:1;
0063         uint64_t rnm_rst:1;
0064         uint64_t rng_en:1;
0065         uint64_t ent_en:1;
0066 #else
0067         uint64_t ent_en:1;
0068         uint64_t rng_en:1;
0069         uint64_t rnm_rst:1;
0070         uint64_t rng_rst:1;
0071         uint64_t exp_ent:1;
0072         uint64_t ent_sel:4;
0073         uint64_t eer_val:1;
0074         uint64_t eer_lck:1;
0075         uint64_t dis_mak:1;
0076         uint64_t reserved_12_63:52;
0077 #endif
0078     } s;
0079     struct cvmx_rnm_ctl_status_cn30xx {
0080 #ifdef __BIG_ENDIAN_BITFIELD
0081         uint64_t reserved_4_63:60;
0082         uint64_t rng_rst:1;
0083         uint64_t rnm_rst:1;
0084         uint64_t rng_en:1;
0085         uint64_t ent_en:1;
0086 #else
0087         uint64_t ent_en:1;
0088         uint64_t rng_en:1;
0089         uint64_t rnm_rst:1;
0090         uint64_t rng_rst:1;
0091         uint64_t reserved_4_63:60;
0092 #endif
0093     } cn30xx;
0094     struct cvmx_rnm_ctl_status_cn50xx {
0095 #ifdef __BIG_ENDIAN_BITFIELD
0096         uint64_t reserved_9_63:55;
0097         uint64_t ent_sel:4;
0098         uint64_t exp_ent:1;
0099         uint64_t rng_rst:1;
0100         uint64_t rnm_rst:1;
0101         uint64_t rng_en:1;
0102         uint64_t ent_en:1;
0103 #else
0104         uint64_t ent_en:1;
0105         uint64_t rng_en:1;
0106         uint64_t rnm_rst:1;
0107         uint64_t rng_rst:1;
0108         uint64_t exp_ent:1;
0109         uint64_t ent_sel:4;
0110         uint64_t reserved_9_63:55;
0111 #endif
0112     } cn50xx;
0113     struct cvmx_rnm_ctl_status_cn63xx {
0114 #ifdef __BIG_ENDIAN_BITFIELD
0115         uint64_t reserved_11_63:53;
0116         uint64_t eer_lck:1;
0117         uint64_t eer_val:1;
0118         uint64_t ent_sel:4;
0119         uint64_t exp_ent:1;
0120         uint64_t rng_rst:1;
0121         uint64_t rnm_rst:1;
0122         uint64_t rng_en:1;
0123         uint64_t ent_en:1;
0124 #else
0125         uint64_t ent_en:1;
0126         uint64_t rng_en:1;
0127         uint64_t rnm_rst:1;
0128         uint64_t rng_rst:1;
0129         uint64_t exp_ent:1;
0130         uint64_t ent_sel:4;
0131         uint64_t eer_val:1;
0132         uint64_t eer_lck:1;
0133         uint64_t reserved_11_63:53;
0134 #endif
0135     } cn63xx;
0136 };
0137
0138 union cvmx_rnm_eer_dbg {
0139     uint64_t u64;
0140     struct cvmx_rnm_eer_dbg_s {
0141 #ifdef __BIG_ENDIAN_BITFIELD
0142         uint64_t dat:64;
0143 #else
0144         uint64_t dat:64;
0145 #endif
0146     } s;
0147 };
0148
0149 union cvmx_rnm_eer_key {
0150     uint64_t u64;
0151     struct cvmx_rnm_eer_key_s {
0152 #ifdef __BIG_ENDIAN_BITFIELD
0153         uint64_t key:64;
0154 #else
0155         uint64_t key:64;
0156 #endif
0157     } s;
0158 };
0159
0160 union cvmx_rnm_serial_num {
0161     uint64_t u64;
0162     struct cvmx_rnm_serial_num_s {
0163 #ifdef __BIG_ENDIAN_BITFIELD
0164         uint64_t dat:64;
0165 #else
0166         uint64_t dat:64;
0167 #endif
0168     } s;
0169 };
0170
0171 #endif