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0001 /***********************license start***************
0002  * Author: Cavium Networks
0003  *
0004  * Contact: support@caviumnetworks.com
0005  * This file is part of the OCTEON SDK
0006  *
0007  * Copyright (c) 2003-2017 Cavium, Inc.
0008  *
0009  * This file is free software; you can redistribute it and/or modify
0010  * it under the terms of the GNU General Public License, Version 2, as
0011  * published by the Free Software Foundation.
0012  *
0013  * This file is distributed in the hope that it will be useful, but
0014  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
0015  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
0016  * NONINFRINGEMENT.  See the GNU General Public License for more
0017  * details.
0018  *
0019  * You should have received a copy of the GNU General Public License
0020  * along with this file; if not, write to the Free Software
0021  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
0022  * or visit http://www.gnu.org/licenses/.
0023  *
0024  * This file may also be available under a different license from Cavium.
0025  * Contact Cavium Networks for more information
0026  ***********************license end**************************************/
0027 
0028 #ifndef __CVMX_PCIERCX_DEFS_H__
0029 #define __CVMX_PCIERCX_DEFS_H__
0030 
0031 #include <uapi/asm/bitfield.h>
0032 
0033 #define CVMX_PCIERCX_CFG001(block_id) (0x0000000000000004ull)
0034 #define CVMX_PCIERCX_CFG006(block_id) (0x0000000000000018ull)
0035 #define CVMX_PCIERCX_CFG008(block_id) (0x0000000000000020ull)
0036 #define CVMX_PCIERCX_CFG009(block_id) (0x0000000000000024ull)
0037 #define CVMX_PCIERCX_CFG010(block_id) (0x0000000000000028ull)
0038 #define CVMX_PCIERCX_CFG011(block_id) (0x000000000000002Cull)
0039 #define CVMX_PCIERCX_CFG030(block_id) (0x0000000000000078ull)
0040 #define CVMX_PCIERCX_CFG031(block_id) (0x000000000000007Cull)
0041 #define CVMX_PCIERCX_CFG032(block_id) (0x0000000000000080ull)
0042 #define CVMX_PCIERCX_CFG034(block_id) (0x0000000000000088ull)
0043 #define CVMX_PCIERCX_CFG035(block_id) (0x000000000000008Cull)
0044 #define CVMX_PCIERCX_CFG040(block_id) (0x00000000000000A0ull)
0045 #define CVMX_PCIERCX_CFG066(block_id) (0x0000000000000108ull)
0046 #define CVMX_PCIERCX_CFG069(block_id) (0x0000000000000114ull)
0047 #define CVMX_PCIERCX_CFG070(block_id) (0x0000000000000118ull)
0048 #define CVMX_PCIERCX_CFG075(block_id) (0x000000000000012Cull)
0049 #define CVMX_PCIERCX_CFG448(block_id) (0x0000000000000700ull)
0050 #define CVMX_PCIERCX_CFG452(block_id) (0x0000000000000710ull)
0051 #define CVMX_PCIERCX_CFG455(block_id) (0x000000000000071Cull)
0052 #define CVMX_PCIERCX_CFG515(block_id) (0x000000000000080Cull)
0053 
0054 union cvmx_pciercx_cfg001 {
0055     uint32_t u32;
0056     struct cvmx_pciercx_cfg001_s {
0057         __BITFIELD_FIELD(uint32_t dpe:1,
0058         __BITFIELD_FIELD(uint32_t sse:1,
0059         __BITFIELD_FIELD(uint32_t rma:1,
0060         __BITFIELD_FIELD(uint32_t rta:1,
0061         __BITFIELD_FIELD(uint32_t sta:1,
0062         __BITFIELD_FIELD(uint32_t devt:2,
0063         __BITFIELD_FIELD(uint32_t mdpe:1,
0064         __BITFIELD_FIELD(uint32_t fbb:1,
0065         __BITFIELD_FIELD(uint32_t reserved_22_22:1,
0066         __BITFIELD_FIELD(uint32_t m66:1,
0067         __BITFIELD_FIELD(uint32_t cl:1,
0068         __BITFIELD_FIELD(uint32_t i_stat:1,
0069         __BITFIELD_FIELD(uint32_t reserved_11_18:8,
0070         __BITFIELD_FIELD(uint32_t i_dis:1,
0071         __BITFIELD_FIELD(uint32_t fbbe:1,
0072         __BITFIELD_FIELD(uint32_t see:1,
0073         __BITFIELD_FIELD(uint32_t ids_wcc:1,
0074         __BITFIELD_FIELD(uint32_t per:1,
0075         __BITFIELD_FIELD(uint32_t vps:1,
0076         __BITFIELD_FIELD(uint32_t mwice:1,
0077         __BITFIELD_FIELD(uint32_t scse:1,
0078         __BITFIELD_FIELD(uint32_t me:1,
0079         __BITFIELD_FIELD(uint32_t msae:1,
0080         __BITFIELD_FIELD(uint32_t isae:1,
0081         ;))))))))))))))))))))))))
0082     } s;
0083 };
0084 
0085 union cvmx_pciercx_cfg006 {
0086     uint32_t u32;
0087     struct cvmx_pciercx_cfg006_s {
0088         __BITFIELD_FIELD(uint32_t slt:8,
0089         __BITFIELD_FIELD(uint32_t subbnum:8,
0090         __BITFIELD_FIELD(uint32_t sbnum:8,
0091         __BITFIELD_FIELD(uint32_t pbnum:8,
0092         ;))))
0093     } s;
0094 };
0095 
0096 union cvmx_pciercx_cfg008 {
0097     uint32_t u32;
0098     struct cvmx_pciercx_cfg008_s {
0099         __BITFIELD_FIELD(uint32_t ml_addr:12,
0100         __BITFIELD_FIELD(uint32_t reserved_16_19:4,
0101         __BITFIELD_FIELD(uint32_t mb_addr:12,
0102         __BITFIELD_FIELD(uint32_t reserved_0_3:4,
0103         ;))))
0104     } s;
0105 };
0106 
0107 union cvmx_pciercx_cfg009 {
0108     uint32_t u32;
0109     struct cvmx_pciercx_cfg009_s {
0110         __BITFIELD_FIELD(uint32_t lmem_limit:12,
0111         __BITFIELD_FIELD(uint32_t reserved_17_19:3,
0112         __BITFIELD_FIELD(uint32_t mem64b:1,
0113         __BITFIELD_FIELD(uint32_t lmem_base:12,
0114         __BITFIELD_FIELD(uint32_t reserved_1_3:3,
0115         __BITFIELD_FIELD(uint32_t mem64a:1,
0116         ;))))))
0117     } s;
0118 };
0119 
0120 union cvmx_pciercx_cfg010 {
0121     uint32_t u32;
0122     struct cvmx_pciercx_cfg010_s {
0123         uint32_t umem_base;
0124     } s;
0125 };
0126 
0127 union cvmx_pciercx_cfg011 {
0128     uint32_t u32;
0129     struct cvmx_pciercx_cfg011_s {
0130         uint32_t umem_limit;
0131     } s;
0132 };
0133 
0134 union cvmx_pciercx_cfg030 {
0135     uint32_t u32;
0136     struct cvmx_pciercx_cfg030_s {
0137         __BITFIELD_FIELD(uint32_t reserved_22_31:10,
0138         __BITFIELD_FIELD(uint32_t tp:1,
0139         __BITFIELD_FIELD(uint32_t ap_d:1,
0140         __BITFIELD_FIELD(uint32_t ur_d:1,
0141         __BITFIELD_FIELD(uint32_t fe_d:1,
0142         __BITFIELD_FIELD(uint32_t nfe_d:1,
0143         __BITFIELD_FIELD(uint32_t ce_d:1,
0144         __BITFIELD_FIELD(uint32_t reserved_15_15:1,
0145         __BITFIELD_FIELD(uint32_t mrrs:3,
0146         __BITFIELD_FIELD(uint32_t ns_en:1,
0147         __BITFIELD_FIELD(uint32_t ap_en:1,
0148         __BITFIELD_FIELD(uint32_t pf_en:1,
0149         __BITFIELD_FIELD(uint32_t etf_en:1,
0150         __BITFIELD_FIELD(uint32_t mps:3,
0151         __BITFIELD_FIELD(uint32_t ro_en:1,
0152         __BITFIELD_FIELD(uint32_t ur_en:1,
0153         __BITFIELD_FIELD(uint32_t fe_en:1,
0154         __BITFIELD_FIELD(uint32_t nfe_en:1,
0155         __BITFIELD_FIELD(uint32_t ce_en:1,
0156         ;)))))))))))))))))))
0157     } s;
0158 };
0159 
0160 union cvmx_pciercx_cfg031 {
0161     uint32_t u32;
0162     struct cvmx_pciercx_cfg031_s {
0163         __BITFIELD_FIELD(uint32_t pnum:8,
0164         __BITFIELD_FIELD(uint32_t reserved_23_23:1,
0165         __BITFIELD_FIELD(uint32_t aspm:1,
0166         __BITFIELD_FIELD(uint32_t lbnc:1,
0167         __BITFIELD_FIELD(uint32_t dllarc:1,
0168         __BITFIELD_FIELD(uint32_t sderc:1,
0169         __BITFIELD_FIELD(uint32_t cpm:1,
0170         __BITFIELD_FIELD(uint32_t l1el:3,
0171         __BITFIELD_FIELD(uint32_t l0el:3,
0172         __BITFIELD_FIELD(uint32_t aslpms:2,
0173         __BITFIELD_FIELD(uint32_t mlw:6,
0174         __BITFIELD_FIELD(uint32_t mls:4,
0175         ;))))))))))))
0176     } s;
0177 };
0178 
0179 union cvmx_pciercx_cfg032 {
0180     uint32_t u32;
0181     struct cvmx_pciercx_cfg032_s {
0182         __BITFIELD_FIELD(uint32_t lab:1,
0183         __BITFIELD_FIELD(uint32_t lbm:1,
0184         __BITFIELD_FIELD(uint32_t dlla:1,
0185         __BITFIELD_FIELD(uint32_t scc:1,
0186         __BITFIELD_FIELD(uint32_t lt:1,
0187         __BITFIELD_FIELD(uint32_t reserved_26_26:1,
0188         __BITFIELD_FIELD(uint32_t nlw:6,
0189         __BITFIELD_FIELD(uint32_t ls:4,
0190         __BITFIELD_FIELD(uint32_t reserved_12_15:4,
0191         __BITFIELD_FIELD(uint32_t lab_int_enb:1,
0192         __BITFIELD_FIELD(uint32_t lbm_int_enb:1,
0193         __BITFIELD_FIELD(uint32_t hawd:1,
0194         __BITFIELD_FIELD(uint32_t ecpm:1,
0195         __BITFIELD_FIELD(uint32_t es:1,
0196         __BITFIELD_FIELD(uint32_t ccc:1,
0197         __BITFIELD_FIELD(uint32_t rl:1,
0198         __BITFIELD_FIELD(uint32_t ld:1,
0199         __BITFIELD_FIELD(uint32_t rcb:1,
0200         __BITFIELD_FIELD(uint32_t reserved_2_2:1,
0201         __BITFIELD_FIELD(uint32_t aslpc:2,
0202         ;))))))))))))))))))))
0203     } s;
0204 };
0205 
0206 union cvmx_pciercx_cfg034 {
0207     uint32_t u32;
0208     struct cvmx_pciercx_cfg034_s {
0209         __BITFIELD_FIELD(uint32_t reserved_25_31:7,
0210         __BITFIELD_FIELD(uint32_t dlls_c:1,
0211         __BITFIELD_FIELD(uint32_t emis:1,
0212         __BITFIELD_FIELD(uint32_t pds:1,
0213         __BITFIELD_FIELD(uint32_t mrlss:1,
0214         __BITFIELD_FIELD(uint32_t ccint_d:1,
0215         __BITFIELD_FIELD(uint32_t pd_c:1,
0216         __BITFIELD_FIELD(uint32_t mrls_c:1,
0217         __BITFIELD_FIELD(uint32_t pf_d:1,
0218         __BITFIELD_FIELD(uint32_t abp_d:1,
0219         __BITFIELD_FIELD(uint32_t reserved_13_15:3,
0220         __BITFIELD_FIELD(uint32_t dlls_en:1,
0221         __BITFIELD_FIELD(uint32_t emic:1,
0222         __BITFIELD_FIELD(uint32_t pcc:1,
0223         __BITFIELD_FIELD(uint32_t pic:1,
0224         __BITFIELD_FIELD(uint32_t aic:1,
0225         __BITFIELD_FIELD(uint32_t hpint_en:1,
0226         __BITFIELD_FIELD(uint32_t ccint_en:1,
0227         __BITFIELD_FIELD(uint32_t pd_en:1,
0228         __BITFIELD_FIELD(uint32_t mrls_en:1,
0229         __BITFIELD_FIELD(uint32_t pf_en:1,
0230         __BITFIELD_FIELD(uint32_t abp_en:1,
0231         ;))))))))))))))))))))))
0232     } s;
0233 };
0234 
0235 union cvmx_pciercx_cfg035 {
0236     uint32_t u32;
0237     struct cvmx_pciercx_cfg035_s {
0238         __BITFIELD_FIELD(uint32_t reserved_17_31:15,
0239         __BITFIELD_FIELD(uint32_t crssv:1,
0240         __BITFIELD_FIELD(uint32_t reserved_5_15:11,
0241         __BITFIELD_FIELD(uint32_t crssve:1,
0242         __BITFIELD_FIELD(uint32_t pmeie:1,
0243         __BITFIELD_FIELD(uint32_t sefee:1,
0244         __BITFIELD_FIELD(uint32_t senfee:1,
0245         __BITFIELD_FIELD(uint32_t secee:1,
0246         ;))))))))
0247     } s;
0248 };
0249 
0250 union cvmx_pciercx_cfg040 {
0251     uint32_t u32;
0252     struct cvmx_pciercx_cfg040_s {
0253         __BITFIELD_FIELD(uint32_t reserved_22_31:10,
0254         __BITFIELD_FIELD(uint32_t ler:1,
0255         __BITFIELD_FIELD(uint32_t ep3s:1,
0256         __BITFIELD_FIELD(uint32_t ep2s:1,
0257         __BITFIELD_FIELD(uint32_t ep1s:1,
0258         __BITFIELD_FIELD(uint32_t eqc:1,
0259         __BITFIELD_FIELD(uint32_t cdl:1,
0260         __BITFIELD_FIELD(uint32_t cde:4,
0261         __BITFIELD_FIELD(uint32_t csos:1,
0262         __BITFIELD_FIELD(uint32_t emc:1,
0263         __BITFIELD_FIELD(uint32_t tm:3,
0264         __BITFIELD_FIELD(uint32_t sde:1,
0265         __BITFIELD_FIELD(uint32_t hasd:1,
0266         __BITFIELD_FIELD(uint32_t ec:1,
0267         __BITFIELD_FIELD(uint32_t tls:4,
0268         ;)))))))))))))))
0269     } s;
0270 };
0271 
0272 union cvmx_pciercx_cfg070 {
0273     uint32_t u32;
0274     struct cvmx_pciercx_cfg070_s {
0275         __BITFIELD_FIELD(uint32_t reserved_12_31:20,
0276         __BITFIELD_FIELD(uint32_t tplp:1,
0277         __BITFIELD_FIELD(uint32_t reserved_9_10:2,
0278         __BITFIELD_FIELD(uint32_t ce:1,
0279         __BITFIELD_FIELD(uint32_t cc:1,
0280         __BITFIELD_FIELD(uint32_t ge:1,
0281         __BITFIELD_FIELD(uint32_t gc:1,
0282         __BITFIELD_FIELD(uint32_t fep:5,
0283         ;))))))))
0284     } s;
0285 };
0286 
0287 union cvmx_pciercx_cfg075 {
0288     uint32_t u32;
0289     struct cvmx_pciercx_cfg075_s {
0290         __BITFIELD_FIELD(uint32_t reserved_3_31:29,
0291         __BITFIELD_FIELD(uint32_t fere:1,
0292         __BITFIELD_FIELD(uint32_t nfere:1,
0293         __BITFIELD_FIELD(uint32_t cere:1,
0294         ;))))
0295     } s;
0296 };
0297 
0298 union cvmx_pciercx_cfg448 {
0299     uint32_t u32;
0300     struct cvmx_pciercx_cfg448_s {
0301         __BITFIELD_FIELD(uint32_t rtl:16,
0302         __BITFIELD_FIELD(uint32_t rtltl:16,
0303         ;))
0304     } s;
0305 };
0306 
0307 union cvmx_pciercx_cfg452 {
0308     uint32_t u32;
0309     struct cvmx_pciercx_cfg452_s {
0310         __BITFIELD_FIELD(uint32_t reserved_26_31:6,
0311         __BITFIELD_FIELD(uint32_t eccrc:1,
0312         __BITFIELD_FIELD(uint32_t reserved_22_24:3,
0313         __BITFIELD_FIELD(uint32_t lme:6,
0314         __BITFIELD_FIELD(uint32_t reserved_12_15:4,
0315         __BITFIELD_FIELD(uint32_t link_rate:4,
0316         __BITFIELD_FIELD(uint32_t flm:1,
0317         __BITFIELD_FIELD(uint32_t reserved_6_6:1,
0318         __BITFIELD_FIELD(uint32_t dllle:1,
0319         __BITFIELD_FIELD(uint32_t reserved_4_4:1,
0320         __BITFIELD_FIELD(uint32_t ra:1,
0321         __BITFIELD_FIELD(uint32_t le:1,
0322         __BITFIELD_FIELD(uint32_t sd:1,
0323         __BITFIELD_FIELD(uint32_t omr:1,
0324         ;))))))))))))))
0325     } s;
0326 };
0327 
0328 union cvmx_pciercx_cfg455 {
0329     uint32_t u32;
0330     struct cvmx_pciercx_cfg455_s {
0331         __BITFIELD_FIELD(uint32_t m_cfg0_filt:1,
0332         __BITFIELD_FIELD(uint32_t m_io_filt:1,
0333         __BITFIELD_FIELD(uint32_t msg_ctrl:1,
0334         __BITFIELD_FIELD(uint32_t m_cpl_ecrc_filt:1,
0335         __BITFIELD_FIELD(uint32_t m_ecrc_filt:1,
0336         __BITFIELD_FIELD(uint32_t m_cpl_len_err:1,
0337         __BITFIELD_FIELD(uint32_t m_cpl_attr_err:1,
0338         __BITFIELD_FIELD(uint32_t m_cpl_tc_err:1,
0339         __BITFIELD_FIELD(uint32_t m_cpl_fun_err:1,
0340         __BITFIELD_FIELD(uint32_t m_cpl_rid_err:1,
0341         __BITFIELD_FIELD(uint32_t m_cpl_tag_err:1,
0342         __BITFIELD_FIELD(uint32_t m_lk_filt:1,
0343         __BITFIELD_FIELD(uint32_t m_cfg1_filt:1,
0344         __BITFIELD_FIELD(uint32_t m_bar_match:1,
0345         __BITFIELD_FIELD(uint32_t m_pois_filt:1,
0346         __BITFIELD_FIELD(uint32_t m_fun:1,
0347         __BITFIELD_FIELD(uint32_t dfcwt:1,
0348         __BITFIELD_FIELD(uint32_t reserved_11_14:4,
0349         __BITFIELD_FIELD(uint32_t skpiv:11,
0350         ;)))))))))))))))))))
0351     } s;
0352 };
0353 
0354 union cvmx_pciercx_cfg515 {
0355     uint32_t u32;
0356     struct cvmx_pciercx_cfg515_s {
0357         __BITFIELD_FIELD(uint32_t reserved_21_31:11,
0358         __BITFIELD_FIELD(uint32_t s_d_e:1,
0359         __BITFIELD_FIELD(uint32_t ctcrb:1,
0360         __BITFIELD_FIELD(uint32_t cpyts:1,
0361         __BITFIELD_FIELD(uint32_t dsc:1,
0362         __BITFIELD_FIELD(uint32_t le:9,
0363         __BITFIELD_FIELD(uint32_t n_fts:8,
0364         ;)))))))
0365     } s;
0366 };
0367 
0368 #endif
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