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0001 /***********************license start*************** 0002 * Author: Cavium Networks 0003 * 0004 * Contact: support@caviumnetworks.com 0005 * This file is part of the OCTEON SDK 0006 * 0007 * Copyright (c) 2003-2008 Cavium Networks 0008 * 0009 * This file is free software; you can redistribute it and/or modify 0010 * it under the terms of the GNU General Public License, Version 2, as 0011 * published by the Free Software Foundation. 0012 * 0013 * This file is distributed in the hope that it will be useful, but 0014 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 0015 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 0016 * NONINFRINGEMENT. See the GNU General Public License for more 0017 * details. 0018 * 0019 * You should have received a copy of the GNU General Public License 0020 * along with this file; if not, write to the Free Software 0021 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 0022 * or visit http://www.gnu.org/licenses/. 0023 * 0024 * This file may also be available under a different license from Cavium. 0025 * Contact Cavium Networks for more information 0026 ***********************license end**************************************/ 0027 0028 /** 0029 * 0030 * Helper functions to abstract board specific data about 0031 * network ports from the rest of the cvmx-helper files. 0032 * 0033 */ 0034 #ifndef __CVMX_HELPER_BOARD_H__ 0035 #define __CVMX_HELPER_BOARD_H__ 0036 0037 #include <asm/octeon/cvmx-helper.h> 0038 0039 enum cvmx_helper_board_usb_clock_types { 0040 USB_CLOCK_TYPE_REF_12, 0041 USB_CLOCK_TYPE_REF_24, 0042 USB_CLOCK_TYPE_REF_48, 0043 USB_CLOCK_TYPE_CRYSTAL_12, 0044 }; 0045 0046 typedef enum { 0047 set_phy_link_flags_autoneg = 0x1, 0048 set_phy_link_flags_flow_control_dont_touch = 0x0 << 1, 0049 set_phy_link_flags_flow_control_enable = 0x1 << 1, 0050 set_phy_link_flags_flow_control_disable = 0x2 << 1, 0051 set_phy_link_flags_flow_control_mask = 0x3 << 1, /* Mask for 2 bit wide flow control field */ 0052 } cvmx_helper_board_set_phy_link_flags_types_t; 0053 0054 /* 0055 * Fake IPD port, the RGMII/MII interface may use different PHY, use 0056 * this macro to return appropriate MIX address to read the PHY. 0057 */ 0058 #define CVMX_HELPER_BOARD_MGMT_IPD_PORT -10 0059 0060 /** 0061 * Return the MII PHY address associated with the given IPD 0062 * port. A result of -1 means there isn't a MII capable PHY 0063 * connected to this port. On chips supporting multiple MII 0064 * busses the bus number is encoded in bits <15:8>. 0065 * 0066 * This function must be modified for every new Octeon board. 0067 * Internally it uses switch statements based on the cvmx_sysinfo 0068 * data to determine board types and revisions. It relies on the 0069 * fact that every Octeon board receives a unique board type 0070 * enumeration from the bootloader. 0071 * 0072 * @ipd_port: Octeon IPD port to get the MII address for. 0073 * 0074 * Returns MII PHY address and bus number or -1. 0075 */ 0076 extern int cvmx_helper_board_get_mii_address(int ipd_port); 0077 0078 /** 0079 * This function is the board specific method of determining an 0080 * ethernet ports link speed. Most Octeon boards have Marvell PHYs 0081 * and are handled by the fall through case. This function must be 0082 * updated for boards that don't have the normal Marvell PHYs. 0083 * 0084 * This function must be modified for every new Octeon board. 0085 * Internally it uses switch statements based on the cvmx_sysinfo 0086 * data to determine board types and revisions. It relies on the 0087 * fact that every Octeon board receives a unique board type 0088 * enumeration from the bootloader. 0089 * 0090 * @ipd_port: IPD input port associated with the port we want to get link 0091 * status for. 0092 * 0093 * Returns The ports link status. If the link isn't fully resolved, this must 0094 * return zero. 0095 */ 0096 extern union cvmx_helper_link_info __cvmx_helper_board_link_get(int ipd_port); 0097 0098 /** 0099 * This function is called by cvmx_helper_interface_probe() after it 0100 * determines the number of ports Octeon can support on a specific 0101 * interface. This function is the per board location to override 0102 * this value. It is called with the number of ports Octeon might 0103 * support and should return the number of actual ports on the 0104 * board. 0105 * 0106 * This function must be modified for every new Octeon board. 0107 * Internally it uses switch statements based on the cvmx_sysinfo 0108 * data to determine board types and revisions. It relies on the 0109 * fact that every Octeon board receives a unique board type 0110 * enumeration from the bootloader. 0111 * 0112 * @interface: Interface to probe 0113 * @supported_ports: 0114 * Number of ports Octeon supports. 0115 * 0116 * Returns Number of ports the actual board supports. Many times this will 0117 * simple be "support_ports". 0118 */ 0119 extern int __cvmx_helper_board_interface_probe(int interface, 0120 int supported_ports); 0121 0122 enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(void); 0123 0124 #endif /* __CVMX_HELPER_BOARD_H__ */
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