asm/octeon/cvmx-fpa.h

0001 /***********************license start***************
0002  * Author: Cavium Networks
0003  *
0004  * Contact: support@caviumnetworks.com
0005  * This file is part of the OCTEON SDK
0006  *
0007  * Copyright (c) 2003-2008 Cavium Networks
0008  *
0009  * This file is free software; you can redistribute it and/or modify
0010  * it under the terms of the GNU General Public License, Version 2, as
0011  * published by the Free Software Foundation.
0012  *
0013  * This file is distributed in the hope that it will be useful, but
0014  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
0015  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
0016  * NONINFRINGEMENT.  See the GNU General Public License for more
0017  * details.
0018  *
0019  * You should have received a copy of the GNU General Public License
0020  * along with this file; if not, write to the Free Software
0021  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
0022  * or visit http://www.gnu.org/licenses/.
0023  *
0024  * This file may also be available under a different license from Cavium.
0025  * Contact Cavium Networks for more information
0026  ***********************license end**************************************/
0027
0028 /**
0029  * @file
0030  *
0031  * Interface to the hardware Free Pool Allocator.
0032  *
0033  *
0034  */
0035
0036 #ifndef __CVMX_FPA_H__
0037 #define __CVMX_FPA_H__
0038
0039 #include <linux/delay.h>
0040
0041 #include <asm/octeon/cvmx-address.h>
0042 #include <asm/octeon/cvmx-fpa-defs.h>
0043
0044 #define CVMX_FPA_NUM_POOLS  8
0045 #define CVMX_FPA_MIN_BLOCK_SIZE 128
0046 #define CVMX_FPA_ALIGNMENT  128
0047
0048 /**
0049  * Structure describing the data format used for stores to the FPA.
0050  */
0051 typedef union {
0052     uint64_t u64;
0053     struct {
0054 #ifdef __BIG_ENDIAN_BITFIELD
0055         /*
0056          * the (64-bit word) location in scratchpad to write
0057          * to (if len != 0)
0058          */
0059         uint64_t scraddr:8;
0060         /* the number of words in the response (0 => no response) */
0061         uint64_t len:8;
0062         /* the ID of the device on the non-coherent bus */
0063         uint64_t did:8;
0064         /*
0065          * the address that will appear in the first tick on
0066          * the NCB bus.
0067          */
0068         uint64_t addr:40;
0069 #else
0070         uint64_t addr:40;
0071         uint64_t did:8;
0072         uint64_t len:8;
0073         uint64_t scraddr:8;
0074 #endif
0075     } s;
0076 } cvmx_fpa_iobdma_data_t;
0077
0078 /**
0079  * Structure describing the current state of a FPA pool.
0080  */
0081 typedef struct {
0082     /* Name it was created under */
0083     const char *name;
0084     /* Size of each block */
0085     uint64_t size;
0086     /* The base memory address of whole block */
0087     void *base;
0088     /* The number of elements in the pool at creation */
0089     uint64_t starting_element_count;
0090 } cvmx_fpa_pool_info_t;
0091
0092 /**
0093  * Current state of all the pools. Use access functions
0094  * instead of using it directly.
0095  */
0096 extern cvmx_fpa_pool_info_t cvmx_fpa_pool_info[CVMX_FPA_NUM_POOLS];
0097
0098 /* CSR typedefs have been moved to cvmx-csr-*.h */
0099
0100 /**
0101  * Return the name of the pool
0102  *
0103  * @pool:   Pool to get the name of
0104  * Returns The name
0105  */
0106 static inline const char *cvmx_fpa_get_name(uint64_t pool)
0107 {
0108     return cvmx_fpa_pool_info[pool].name;
0109 }
0110
0111 /**
0112  * Return the base of the pool
0113  *
0114  * @pool:   Pool to get the base of
0115  * Returns The base
0116  */
0117 static inline void *cvmx_fpa_get_base(uint64_t pool)
0118 {
0119     return cvmx_fpa_pool_info[pool].base;
0120 }
0121
0122 /**
0123  * Check if a pointer belongs to an FPA pool. Return non-zero
0124  * if the supplied pointer is inside the memory controlled by
0125  * an FPA pool.
0126  *
0127  * @pool:   Pool to check
0128  * @ptr:    Pointer to check
0129  * Returns Non-zero if pointer is in the pool. Zero if not
0130  */
0131 static inline int cvmx_fpa_is_member(uint64_t pool, void *ptr)
0132 {
0133     return ((ptr >= cvmx_fpa_pool_info[pool].base) &&
0134         ((char *)ptr <
0135          ((char *)(cvmx_fpa_pool_info[pool].base)) +
0136          cvmx_fpa_pool_info[pool].size *
0137          cvmx_fpa_pool_info[pool].starting_element_count));
0138 }
0139
0140 /**
0141  * Enable the FPA for use. Must be performed after any CSR
0142  * configuration but before any other FPA functions.
0143  */
0144 static inline void cvmx_fpa_enable(void)
0145 {
0146     union cvmx_fpa_ctl_status status;
0147
0148     status.u64 = cvmx_read_csr(CVMX_FPA_CTL_STATUS);
0149     if (status.s.enb) {
0150         cvmx_dprintf
0151             ("Warning: Enabling FPA when FPA already enabled.\n");
0152     }
0153
0154     /*
0155      * Do runtime check as we allow pass1 compiled code to run on
0156      * pass2 chips.
0157      */
0158     if (cvmx_octeon_is_pass1()) {
0159         union cvmx_fpa_fpfx_marks marks;
0160         int i;
0161         for (i = 1; i < 8; i++) {
0162             marks.u64 =
0163                 cvmx_read_csr(CVMX_FPA_FPF1_MARKS + (i - 1) * 8ull);
0164             marks.s.fpf_wr = 0xe0;
0165             cvmx_write_csr(CVMX_FPA_FPF1_MARKS + (i - 1) * 8ull,
0166                        marks.u64);
0167         }
0168
0169         /* Enforce a 10 cycle delay between config and enable */
0170         __delay(10);
0171     }
0172
0173     /* FIXME: CVMX_FPA_CTL_STATUS read is unmodelled */
0174     status.u64 = 0;
0175     status.s.enb = 1;
0176     cvmx_write_csr(CVMX_FPA_CTL_STATUS, status.u64);
0177 }
0178
0179 /**
0180  * Get a new block from the FPA
0181  *
0182  * @pool:   Pool to get the block from
0183  * Returns Pointer to the block or NULL on failure
0184  */
0185 static inline void *cvmx_fpa_alloc(uint64_t pool)
0186 {
0187     uint64_t address =
0188         cvmx_read_csr(CVMX_ADDR_DID(CVMX_FULL_DID(CVMX_OCT_DID_FPA, pool)));
0189     if (address)
0190         return cvmx_phys_to_ptr(address);
0191     else
0192         return NULL;
0193 }
0194
0195 /**
0196  * Asynchronously get a new block from the FPA
0197  *
0198  * @scr_addr: Local scratch address to put response in.  This is a byte address,
0199  *          but must be 8 byte aligned.
0200  * @pool:      Pool to get the block from
0201  */
0202 static inline void cvmx_fpa_async_alloc(uint64_t scr_addr, uint64_t pool)
0203 {
0204     cvmx_fpa_iobdma_data_t data;
0205
0206     /*
0207      * Hardware only uses 64 bit aligned locations, so convert
0208      * from byte address to 64-bit index
0209      */
0210     data.s.scraddr = scr_addr >> 3;
0211     data.s.len = 1;
0212     data.s.did = CVMX_FULL_DID(CVMX_OCT_DID_FPA, pool);
0213     data.s.addr = 0;
0214     cvmx_send_single(data.u64);
0215 }
0216
0217 /**
0218  * Free a block allocated with a FPA pool.  Does NOT provide memory
0219  * ordering in cases where the memory block was modified by the core.
0220  *
0221  * @ptr:    Block to free
0222  * @pool:   Pool to put it in
0223  * @num_cache_lines:
0224  *       Cache lines to invalidate
0225  */
0226 static inline void cvmx_fpa_free_nosync(void *ptr, uint64_t pool,
0227                     uint64_t num_cache_lines)
0228 {
0229     cvmx_addr_t newptr;
0230     newptr.u64 = cvmx_ptr_to_phys(ptr);
0231     newptr.sfilldidspace.didspace =
0232         CVMX_ADDR_DIDSPACE(CVMX_FULL_DID(CVMX_OCT_DID_FPA, pool));
0233     /* Prevent GCC from reordering around free */
0234     barrier();
0235     /* value written is number of cache lines not written back */
0236     cvmx_write_io(newptr.u64, num_cache_lines);
0237 }
0238
0239 /**
0240  * Free a block allocated with a FPA pool.  Provides required memory
0241  * ordering in cases where memory block was modified by core.
0242  *
0243  * @ptr:    Block to free
0244  * @pool:   Pool to put it in
0245  * @num_cache_lines:
0246  *       Cache lines to invalidate
0247  */
0248 static inline void cvmx_fpa_free(void *ptr, uint64_t pool,
0249                  uint64_t num_cache_lines)
0250 {
0251     cvmx_addr_t newptr;
0252     newptr.u64 = cvmx_ptr_to_phys(ptr);
0253     newptr.sfilldidspace.didspace =
0254         CVMX_ADDR_DIDSPACE(CVMX_FULL_DID(CVMX_OCT_DID_FPA, pool));
0255     /*
0256      * Make sure that any previous writes to memory go out before
0257      * we free this buffer.  This also serves as a barrier to
0258      * prevent GCC from reordering operations to after the
0259      * free.
0260      */
0261     CVMX_SYNCWS;
0262     /* value written is number of cache lines not written back */
0263     cvmx_write_io(newptr.u64, num_cache_lines);
0264 }
0265
0266 /**
0267  * Setup a FPA pool to control a new block of memory.
0268  * This can only be called once per pool. Make sure proper
0269  * locking enforces this.
0270  *
0271  * @pool:   Pool to initialize
0272  *           0 <= pool < 8
0273  * @name:   Constant character string to name this pool.
0274  *           String is not copied.
0275  * @buffer: Pointer to the block of memory to use. This must be
0276  *           accessible by all processors and external hardware.
0277  * @block_size: Size for each block controlled by the FPA
0278  * @num_blocks: Number of blocks
0279  *
0280  * Returns 0 on Success,
0281  *     -1 on failure
0282  */
0283 extern int cvmx_fpa_setup_pool(uint64_t pool, const char *name, void *buffer,
0284                    uint64_t block_size, uint64_t num_blocks);
0285
0286 /**
0287  * Shutdown a Memory pool and validate that it had all of
0288  * the buffers originally placed in it. This should only be
0289  * called by one processor after all hardware has finished
0290  * using the pool.
0291  *
0292  * @pool:   Pool to shutdown
0293  * Returns Zero on success
0294  *     - Positive is count of missing buffers
0295  *     - Negative is too many buffers or corrupted pointers
0296  */
0297 extern uint64_t cvmx_fpa_shutdown_pool(uint64_t pool);
0298
0299 /**
0300  * Get the size of blocks controlled by the pool
0301  * This is resolved to a constant at compile time.
0302  *
0303  * @pool:   Pool to access
0304  * Returns Size of the block in bytes
0305  */
0306 uint64_t cvmx_fpa_get_block_size(uint64_t pool);
0307
0308 #endif /*  __CVM_FPA_H__ */