include/asm/mips-r2-to-r6-emul.h

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (c) 2014 Imagination Technologies Ltd.
0007  * Author: Markos Chandras <markos.chandras@imgtec.com>
0008  */
0009
0010 #ifndef __ASM_MIPS_R2_TO_R6_EMUL_H
0011 #define __ASM_MIPS_R2_TO_R6_EMUL_H
0012
0013 struct mips_r2_emulator_stats {
0014     u64 movs;
0015     u64 hilo;
0016     u64 muls;
0017     u64 divs;
0018     u64 dsps;
0019     u64 bops;
0020     u64 traps;
0021     u64 fpus;
0022     u64 loads;
0023     u64 stores;
0024     u64 llsc;
0025     u64 dsemul;
0026 };
0027
0028 struct mips_r2br_emulator_stats {
0029     u64 jrs;
0030     u64 bltzl;
0031     u64 bgezl;
0032     u64 bltzll;
0033     u64 bgezll;
0034     u64 bltzall;
0035     u64 bgezall;
0036     u64 bltzal;
0037     u64 bgezal;
0038     u64 beql;
0039     u64 bnel;
0040     u64 blezl;
0041     u64 bgtzl;
0042 };
0043
0044 #ifdef CONFIG_DEBUG_FS
0045
0046 #define MIPS_R2_STATS(M)                        \
0047 do {                                    \
0048     u32 nir;                            \
0049     int err;                            \
0050                                     \
0051     preempt_disable();                      \
0052     __this_cpu_inc(mipsr2emustats.M);               \
0053     err = __get_user(nir, (u32 __user *)regs->cp0_epc);     \
0054     if (!err) {                         \
0055         if (nir == BREAK_MATH(0))               \
0056             __this_cpu_inc(mipsr2bdemustats.M);     \
0057     }                               \
0058     preempt_enable();                       \
0059 } while (0)
0060
0061 #define MIPS_R2BR_STATS(M)                  \
0062 do {                                \
0063     preempt_disable();                  \
0064     __this_cpu_inc(mipsr2bremustats.M);         \
0065     preempt_enable();                   \
0066 } while (0)
0067
0068 #else
0069
0070 #define MIPS_R2_STATS(M)          do { } while (0)
0071 #define MIPS_R2BR_STATS(M)        do { } while (0)
0072
0073 #endif /* CONFIG_DEBUG_FS */
0074
0075 struct r2_decoder_table {
0076     u32     mask;
0077     u32     code;
0078     int     (*func)(struct pt_regs *regs, u32 inst);
0079 };
0080
0081
0082 extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code, int si_code,
0083               const char *str);
0084
0085 #ifndef CONFIG_MIPSR2_TO_R6_EMULATOR
0086 static int mipsr2_emulation;
0087 static inline int mipsr2_decoder(struct pt_regs *regs, u32 inst,
0088                  unsigned long *fcr31)
0089 {
0090     return 0;
0091 };
0092 #else
0093 /* MIPS R2 Emulator ON/OFF */
0094 extern int mipsr2_emulation;
0095 extern int mipsr2_decoder(struct pt_regs *regs, u32 inst,
0096               unsigned long *fcr31);
0097 #endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */
0098
0099 #define NO_R6EMU    (cpu_has_mips_r6 && !mipsr2_emulation)
0100
0101 #endif /* __ASM_MIPS_R2_TO_R6_EMUL_H */