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0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org)
0007  */
0008 #ifndef __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
0009 #define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
0010 
0011 /*
0012  * Sibyte are MIPS64 processors wired to a specific configuration
0013  */
0014 #define cpu_has_watch       1
0015 #define cpu_has_mips16      0
0016 #define cpu_has_mips16e2    0
0017 #define cpu_has_divec       1
0018 #define cpu_has_vce     0
0019 #define cpu_has_cache_cdex_p    0
0020 #define cpu_has_cache_cdex_s    0
0021 #define cpu_has_prefetch    1
0022 #define cpu_has_mcheck      1
0023 #define cpu_has_ejtag       1
0024 
0025 #define cpu_has_llsc        1
0026 #define cpu_has_vtag_icache 1
0027 #define cpu_has_dc_aliases  0
0028 #define cpu_has_ic_fills_f_dc   0
0029 #define cpu_has_dsp     0
0030 #define cpu_has_dsp2        0
0031 #define cpu_has_mipsmt      0
0032 #define cpu_has_userlocal   0
0033 #define cpu_icache_snoops_remote_store  0
0034 
0035 #define cpu_has_nofpuex     0
0036 #define cpu_has_64bits      1
0037 
0038 #define cpu_has_mips32r1    1
0039 #define cpu_has_mips32r2    0
0040 #define cpu_has_mips64r1    1
0041 #define cpu_has_mips64r2    0
0042 
0043 #define cpu_has_inclusive_pcaches   0
0044 
0045 #define cpu_dcache_line_size()  32
0046 #define cpu_icache_line_size()  32
0047 #define cpu_scache_line_size()  32
0048 
0049 #endif /* __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H */