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0001 /* 0002 * Definitions for timer registers 0003 * 0004 * Copyright 2004 Philip Rischel <rischelp@idt.com> 0005 * Copyright 2008 Florian Fainelli <florian@openwrt.org> 0006 * 0007 * This program is free software; you can redistribute it and/or modify it 0008 * under the terms of the GNU General Public License as published by the 0009 * Free Software Foundation; either version 2 of the License, or (at your 0010 * option) any later version. 0011 * 0012 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 0013 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 0014 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 0015 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 0016 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 0017 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 0018 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 0019 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 0020 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 0021 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 0022 * 0023 * You should have received a copy of the GNU General Public License along 0024 * with this program; if not, write to the Free Software Foundation, Inc., 0025 * 675 Mass Ave, Cambridge, MA 02139, USA. 0026 * 0027 */ 0028 0029 #ifndef __ASM_RC32434_TIMER_H 0030 #define __ASM_RC32434_TIMER_H 0031 0032 #include <asm/mach-rc32434/rb.h> 0033 0034 #define TIMER0_BASE_ADDR 0x18028000 0035 #define TIMER_COUNT 3 0036 0037 struct timer_counter { 0038 u32 count; 0039 u32 compare; 0040 u32 ctc; /*use CTC_ */ 0041 }; 0042 0043 struct timer { 0044 struct timer_counter tim[TIMER_COUNT]; 0045 u32 rcount; /* use RCOUNT_ */ 0046 u32 rcompare; /* use RCOMPARE_ */ 0047 u32 rtc; /* use RTC_ */ 0048 }; 0049 0050 #define RC32434_CTC_EN_BIT 0 0051 #define RC32434_CTC_TO_BIT 1 0052 0053 /* Real time clock registers */ 0054 #define RC32434_RTC_MSK(x) BIT_TO_MASK(x) 0055 #define RC32434_RTC_CE_BIT 0 0056 #define RC32434_RTC_TO_BIT 1 0057 #define RC32434_RTC_RQE_BIT 2 0058 0059 /* Counter registers */ 0060 #define RC32434_RCOUNT_BIT 0 0061 #define RC32434_RCOUNT_MSK 0x0000ffff 0062 #define RC32434_RCOMP_BIT 0 0063 #define RC32434_RCOMP_MSK 0x0000ffff 0064 0065 #endif /* __ASM_RC32434_TIMER_H */
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