Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Ralink RT3662/RT3883 specific CPU feature overrides
0004  *
0005  * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
0006  *
0007  * This file was derived from: include/asm-mips/cpu-features.h
0008  *  Copyright (C) 2003, 2004 Ralf Baechle
0009  *  Copyright (C) 2004 Maciej W. Rozycki
0010  */
0011 #ifndef _RT3883_CPU_FEATURE_OVERRIDES_H
0012 #define _RT3883_CPU_FEATURE_OVERRIDES_H
0013 
0014 #define cpu_has_tlb     1
0015 #define cpu_has_4kex        1
0016 #define cpu_has_3k_cache    0
0017 #define cpu_has_4k_cache    1
0018 #define cpu_has_sb1_cache   0
0019 #define cpu_has_fpu     0
0020 #define cpu_has_32fpr       0
0021 #define cpu_has_counter     1
0022 #define cpu_has_watch       1
0023 #define cpu_has_divec       1
0024 
0025 #define cpu_has_prefetch    1
0026 #define cpu_has_ejtag       1
0027 #define cpu_has_llsc        1
0028 
0029 #define cpu_has_mips16      1
0030 #define cpu_has_mdmx        0
0031 #define cpu_has_mips3d      0
0032 #define cpu_has_smartmips   0
0033 
0034 #define cpu_has_mips32r1    1
0035 #define cpu_has_mips32r2    1
0036 #define cpu_has_mips64r1    0
0037 #define cpu_has_mips64r2    0
0038 
0039 #define cpu_has_dsp     1
0040 #define cpu_has_mipsmt      0
0041 
0042 #define cpu_has_64bits      0
0043 #define cpu_has_64bit_zero_reg  0
0044 #define cpu_has_64bit_gp_regs   0
0045 
0046 #define cpu_dcache_line_size()  32
0047 #define cpu_icache_line_size()  32
0048 
0049 #endif /* _RT3883_CPU_FEATURE_OVERRIDES_H */