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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Ralink RT305x specific CPU feature overrides
0004  *
0005  * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
0006  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
0007  *
0008  * This file was derived from: include/asm-mips/cpu-features.h
0009  *  Copyright (C) 2003, 2004 Ralf Baechle
0010  *  Copyright (C) 2004 Maciej W. Rozycki
0011  */
0012 #ifndef _RT305X_CPU_FEATURE_OVERRIDES_H
0013 #define _RT305X_CPU_FEATURE_OVERRIDES_H
0014 
0015 #define cpu_has_tlb     1
0016 #define cpu_has_4kex        1
0017 #define cpu_has_3k_cache    0
0018 #define cpu_has_4k_cache    1
0019 #define cpu_has_sb1_cache   0
0020 #define cpu_has_fpu     0
0021 #define cpu_has_32fpr       0
0022 #define cpu_has_counter     1
0023 #define cpu_has_watch       1
0024 #define cpu_has_divec       1
0025 
0026 #define cpu_has_prefetch    1
0027 #define cpu_has_ejtag       1
0028 #define cpu_has_llsc        1
0029 
0030 #define cpu_has_mips16      1
0031 #define cpu_has_mdmx        0
0032 #define cpu_has_mips3d      0
0033 #define cpu_has_smartmips   0
0034 
0035 #define cpu_has_mips32r1    1
0036 #define cpu_has_mips32r2    1
0037 #define cpu_has_mips64r1    0
0038 #define cpu_has_mips64r2    0
0039 
0040 #define cpu_has_dsp     1
0041 #define cpu_has_mipsmt      0
0042 
0043 #define cpu_has_64bits      0
0044 #define cpu_has_64bit_zero_reg  0
0045 #define cpu_has_64bit_gp_regs   0
0046 
0047 #define cpu_dcache_line_size()  32
0048 #define cpu_icache_line_size()  32
0049 
0050 #endif /* _RT305X_CPU_FEATURE_OVERRIDES_H */