mach-ralink/mt7621/cpu-feature-overrides.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Ralink MT7621 specific CPU feature overrides
0004  *
0005  * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
0006  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
0007  * Copyright (C) 2015 Felix Fietkau <nbd@openwrt.org>
0008  *
0009  * This file was derived from: include/asm-mips/cpu-features.h
0010  *  Copyright (C) 2003, 2004 Ralf Baechle
0011  *  Copyright (C) 2004 Maciej W. Rozycki
0012  */
0013 #ifndef _MT7621_CPU_FEATURE_OVERRIDES_H
0014 #define _MT7621_CPU_FEATURE_OVERRIDES_H
0015
0016 #define cpu_has_tlb     1
0017 #define cpu_has_4kex        1
0018 #define cpu_has_3k_cache    0
0019 #define cpu_has_4k_cache    1
0020 #define cpu_has_sb1_cache   0
0021 #define cpu_has_fpu     0
0022 #define cpu_has_32fpr       0
0023 #define cpu_has_counter     1
0024 #define cpu_has_watch       1
0025 #define cpu_has_divec       1
0026
0027 #define cpu_has_prefetch    1
0028 #define cpu_has_ejtag       1
0029 #define cpu_has_llsc        1
0030
0031 #define cpu_has_mips16      1
0032 #define cpu_has_mdmx        0
0033 #define cpu_has_mips3d      0
0034 #define cpu_has_smartmips   0
0035
0036 #define cpu_has_mips32r1    1
0037 #define cpu_has_mips32r2    1
0038 #define cpu_has_mips64r1    0
0039 #define cpu_has_mips64r2    0
0040
0041 #define cpu_has_dsp     1
0042 #define cpu_has_dsp2        0
0043 #define cpu_has_mipsmt      1
0044
0045 #define cpu_has_64bits      0
0046 #define cpu_has_64bit_zero_reg  0
0047 #define cpu_has_64bit_gp_regs   0
0048
0049 #define cpu_dcache_line_size()  32
0050 #define cpu_icache_line_size()  32
0051
0052 #define cpu_has_dc_aliases  0
0053 #define cpu_has_vtag_icache 0
0054
0055 #define cpu_has_rixi        0
0056 #define cpu_has_tlbinv      0
0057 #define cpu_has_userlocal   1
0058
0059 #endif /* _MT7621_CPU_FEATURE_OVERRIDES_H */