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0007 #ifndef _MT7621_REGS_H_
0008 #define _MT7621_REGS_H_
0009
0010 #define MT7621_PALMBUS_BASE 0x1C000000
0011 #define MT7621_PALMBUS_SIZE 0x03FFFFFF
0012
0013 #define MT7621_SYSC_BASE 0x1E000000
0014
0015 #define SYSC_REG_CHIP_NAME0 0x00
0016 #define SYSC_REG_CHIP_NAME1 0x04
0017 #define SYSC_REG_CHIP_REV 0x0c
0018 #define SYSC_REG_SYSTEM_CONFIG0 0x10
0019 #define SYSC_REG_SYSTEM_CONFIG1 0x14
0020
0021 #define CHIP_REV_PKG_MASK 0x1
0022 #define CHIP_REV_PKG_SHIFT 16
0023 #define CHIP_REV_VER_MASK 0xf
0024 #define CHIP_REV_VER_SHIFT 8
0025 #define CHIP_REV_ECO_MASK 0xf
0026
0027 #define MT7621_LOWMEM_BASE 0x0
0028 #define MT7621_LOWMEM_MAX_SIZE 0x1C000000
0029 #define MT7621_HIGHMEM_BASE 0x20000000
0030 #define MT7621_HIGHMEM_SIZE 0x4000000
0031
0032 #define MT7621_CHIP_NAME0 0x3637544D
0033 #define MT7621_CHIP_NAME1 0x20203132
0034
0035 #endif