asm/mach-loongson64/loongson.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (C) 2009 Lemote, Inc.
0004  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
0005  */
0006
0007 #ifndef __ASM_MACH_LOONGSON64_LOONGSON_H
0008 #define __ASM_MACH_LOONGSON64_LOONGSON_H
0009
0010 #include <linux/io.h>
0011 #include <linux/init.h>
0012 #include <linux/irq.h>
0013 #include <boot_param.h>
0014
0015 enum loongson_fw_interface {
0016     LOONGSON_LEFI,
0017     LOONGSON_DTB,
0018 };
0019
0020 /* machine-specific boot configuration */
0021 struct loongson_system_configuration {
0022     enum loongson_fw_interface fw_interface;
0023     u32 nr_cpus;
0024     u32 nr_nodes;
0025     int cores_per_node;
0026     int cores_per_package;
0027     u16 boot_cpu_id;
0028     u16 reserved_cpus_mask;
0029     enum loongson_cpu_type cputype;
0030     enum loongson_bridge_type bridgetype;
0031     u64 restart_addr;
0032     u64 poweroff_addr;
0033     u64 suspend_addr;
0034     u64 vgabios_addr;
0035     u32 dma_mask_bits;
0036     u64 workarounds;
0037     void (*early_config)(void);
0038 };
0039
0040 /* machine-specific reboot/halt operation */
0041 extern void mach_prepare_reboot(void);
0042 extern void mach_prepare_shutdown(void);
0043
0044 /* environment arguments from bootloader */
0045 extern u32 cpu_clock_freq;
0046 extern u32 memsize, highmemsize;
0047 extern const struct plat_smp_ops loongson3_smp_ops;
0048
0049 /* loongson-specific command line, env and memory initialization */
0050 extern void __init prom_dtb_init_env(void);
0051 extern void __init prom_lefi_init_env(void);
0052 extern void __init szmem(unsigned int node);
0053 extern void *loongson_fdt_blob;
0054
0055 /* irq operation functions */
0056 extern void mach_irq_dispatch(unsigned int pending);
0057 extern int mach_i8259_irq(void);
0058
0059 /* We need this in some places... */
0060 #define delay() ({      \
0061     int x;              \
0062     for (x = 0; x < 100000; x++)    \
0063         __asm__ __volatile__(""); \
0064 })
0065
0066 #define LOONGSON_REG(x) \
0067     (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))
0068
0069 #define LOONGSON3_REG8(base, x) \
0070     (*(volatile u8 *)((char *)TO_UNCAC(base) + (x)))
0071
0072 #define LOONGSON3_REG32(base, x) \
0073     (*(volatile u32 *)((char *)TO_UNCAC(base) + (x)))
0074
0075 #define LOONGSON_FLASH_BASE 0x1c000000
0076 #define LOONGSON_FLASH_SIZE 0x02000000  /* 32M */
0077 #define LOONGSON_FLASH_TOP  (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
0078
0079 #define LOONGSON_LIO0_BASE  0x1e000000
0080 #define LOONGSON_LIO0_SIZE  0x01C00000  /* 28M */
0081 #define LOONGSON_LIO0_TOP   (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
0082
0083 #define LOONGSON_BOOT_BASE  0x1fc00000
0084 #define LOONGSON_BOOT_SIZE  0x00100000  /* 1M */
0085 #define LOONGSON_BOOT_TOP   (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
0086 #define LOONGSON_REG_BASE   0x1fe00000
0087 #define LOONGSON_REG_SIZE   0x00100000  /* 256Bytes + 256Bytes + ??? */
0088 #define LOONGSON_REG_TOP    (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
0089 /* Loongson-3 specific registers */
0090 #define LOONGSON3_REG_BASE  0x3ff00000
0091 #define LOONGSON3_REG_SIZE  0x00100000  /* 256Bytes + 256Bytes + ??? */
0092 #define LOONGSON3_REG_TOP   (LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1)
0093
0094 #define LOONGSON_LIO1_BASE  0x1ff00000
0095 #define LOONGSON_LIO1_SIZE  0x00100000  /* 1M */
0096 #define LOONGSON_LIO1_TOP   (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
0097
0098 #define LOONGSON_PCILO0_BASE    0x10000000
0099 #define LOONGSON_PCILO1_BASE    0x14000000
0100 #define LOONGSON_PCILO2_BASE    0x18000000
0101 #define LOONGSON_PCILO_BASE LOONGSON_PCILO0_BASE
0102 #define LOONGSON_PCILO_SIZE 0x0c000000  /* 64M * 3 */
0103 #define LOONGSON_PCILO_TOP  (LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1)
0104
0105 #define LOONGSON_PCICFG_BASE    0x1fe80000
0106 #define LOONGSON_PCICFG_SIZE    0x00000800  /* 2K */
0107 #define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1)
0108
0109 #define LOONGSON_PCIIO_BASE loongson_sysconf.pci_io_base
0110
0111 #define LOONGSON_PCIIO_SIZE 0x00100000  /* 1M */
0112 #define LOONGSON_PCIIO_TOP  (LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1)
0113
0114 /* Loongson Register Bases */
0115
0116 #define LOONGSON_PCICONFIGBASE  0x00
0117 #define LOONGSON_REGBASE    0x100
0118
0119 /* PCI Configuration Registers */
0120
0121 #define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x))
0122 #define LOONGSON_PCIDID     LOONGSON_PCI_REG(0x00)
0123 #define LOONGSON_PCICMD     LOONGSON_PCI_REG(0x04)
0124 #define LOONGSON_PCICLASS   LOONGSON_PCI_REG(0x08)
0125 #define LOONGSON_PCILTIMER  LOONGSON_PCI_REG(0x0c)
0126 #define LOONGSON_PCIBASE0   LOONGSON_PCI_REG(0x10)
0127 #define LOONGSON_PCIBASE1   LOONGSON_PCI_REG(0x14)
0128 #define LOONGSON_PCIBASE2   LOONGSON_PCI_REG(0x18)
0129 #define LOONGSON_PCIBASE3   LOONGSON_PCI_REG(0x1c)
0130 #define LOONGSON_PCIBASE4   LOONGSON_PCI_REG(0x20)
0131 #define LOONGSON_PCIEXPRBASE    LOONGSON_PCI_REG(0x30)
0132 #define LOONGSON_PCIINT     LOONGSON_PCI_REG(0x3c)
0133
0134 #define LOONGSON_PCI_ISR4C  LOONGSON_PCI_REG(0x4c)
0135
0136 #define LOONGSON_PCICMD_PERR_CLR    0x80000000
0137 #define LOONGSON_PCICMD_SERR_CLR    0x40000000
0138 #define LOONGSON_PCICMD_MABORT_CLR  0x20000000
0139 #define LOONGSON_PCICMD_MTABORT_CLR 0x10000000
0140 #define LOONGSON_PCICMD_TABORT_CLR  0x08000000
0141 #define LOONGSON_PCICMD_MPERR_CLR   0x01000000
0142 #define LOONGSON_PCICMD_PERRRESPEN  0x00000040
0143 #define LOONGSON_PCICMD_ASTEPEN     0x00000080
0144 #define LOONGSON_PCICMD_SERREN      0x00000100
0145 #define LOONGSON_PCILTIMER_BUSLATENCY   0x0000ff00
0146 #define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT 8
0147
0148 /* Loongson h/w Configuration */
0149
0150 #define LOONGSON_GENCFG_OFFSET      0x4
0151 #define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET)
0152
0153 #define LOONGSON_GENCFG_DEBUGMODE   0x00000001
0154 #define LOONGSON_GENCFG_SNOOPEN     0x00000002
0155 #define LOONGSON_GENCFG_CPUSELFRESET    0x00000004
0156
0157 #define LOONGSON_GENCFG_FORCE_IRQA  0x00000008
0158 #define LOONGSON_GENCFG_IRQA_ISOUT  0x00000010
0159 #define LOONGSON_GENCFG_IRQA_FROM_INT1  0x00000020
0160 #define LOONGSON_GENCFG_BYTESWAP    0x00000040
0161
0162 #define LOONGSON_GENCFG_UNCACHED    0x00000080
0163 #define LOONGSON_GENCFG_PREFETCHEN  0x00000100
0164 #define LOONGSON_GENCFG_WBEHINDEN   0x00000200
0165 #define LOONGSON_GENCFG_CACHEALG    0x00000c00
0166 #define LOONGSON_GENCFG_CACHEALG_SHIFT  10
0167 #define LOONGSON_GENCFG_PCIQUEUE    0x00001000
0168 #define LOONGSON_GENCFG_CACHESTOP   0x00002000
0169 #define LOONGSON_GENCFG_MSTRBYTESWAP    0x00004000
0170 #define LOONGSON_GENCFG_BUSERREN    0x00008000
0171 #define LOONGSON_GENCFG_NORETRYTIMEOUT  0x00010000
0172 #define LOONGSON_GENCFG_SHORTCOPYTIMEOUT    0x00020000
0173
0174 /* PCI address map control */
0175
0176 #define LOONGSON_PCIMAP         LOONGSON_REG(LOONGSON_REGBASE + 0x10)
0177 #define LOONGSON_PCIMEMBASECFG      LOONGSON_REG(LOONGSON_REGBASE + 0x14)
0178 #define LOONGSON_PCIMAP_CFG     LOONGSON_REG(LOONGSON_REGBASE + 0x18)
0179
0180 /* GPIO Regs - r/w */
0181
0182 #define LOONGSON_GPIODATA       LOONGSON_REG(LOONGSON_REGBASE + 0x1c)
0183 #define LOONGSON_GPIOIE         LOONGSON_REG(LOONGSON_REGBASE + 0x20)
0184
0185 /* ICU Configuration Regs - r/w */
0186
0187 #define LOONGSON_INTEDGE        LOONGSON_REG(LOONGSON_REGBASE + 0x24)
0188 #define LOONGSON_INTSTEER       LOONGSON_REG(LOONGSON_REGBASE + 0x28)
0189 #define LOONGSON_INTPOL         LOONGSON_REG(LOONGSON_REGBASE + 0x2c)
0190
0191 /* ICU Enable Regs - IntEn & IntISR are r/o. */
0192
0193 #define LOONGSON_INTENSET       LOONGSON_REG(LOONGSON_REGBASE + 0x30)
0194 #define LOONGSON_INTENCLR       LOONGSON_REG(LOONGSON_REGBASE + 0x34)
0195 #define LOONGSON_INTEN          LOONGSON_REG(LOONGSON_REGBASE + 0x38)
0196 #define LOONGSON_INTISR         LOONGSON_REG(LOONGSON_REGBASE + 0x3c)
0197
0198 /* ICU */
0199 #define LOONGSON_ICU_MBOXES     0x0000000f
0200 #define LOONGSON_ICU_MBOXES_SHIFT   0
0201 #define LOONGSON_ICU_DMARDY     0x00000010
0202 #define LOONGSON_ICU_DMAEMPTY       0x00000020
0203 #define LOONGSON_ICU_COPYRDY        0x00000040
0204 #define LOONGSON_ICU_COPYEMPTY      0x00000080
0205 #define LOONGSON_ICU_COPYERR        0x00000100
0206 #define LOONGSON_ICU_PCIIRQ     0x00000200
0207 #define LOONGSON_ICU_MASTERERR      0x00000400
0208 #define LOONGSON_ICU_SYSTEMERR      0x00000800
0209 #define LOONGSON_ICU_DRAMPERR       0x00001000
0210 #define LOONGSON_ICU_RETRYERR       0x00002000
0211 #define LOONGSON_ICU_GPIOS      0x01ff0000
0212 #define LOONGSON_ICU_GPIOS_SHIFT        16
0213 #define LOONGSON_ICU_GPINS      0x7e000000
0214 #define LOONGSON_ICU_GPINS_SHIFT        25
0215 #define LOONGSON_ICU_MBOX(N)        (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N)))
0216 #define LOONGSON_ICU_GPIO(N)        (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N)))
0217 #define LOONGSON_ICU_GPIN(N)        (1<<(LOONGSON_ICU_GPINS_SHIFT+(N)))
0218
0219 /* PCI prefetch window base & mask */
0220
0221 #define LOONGSON_MEM_WIN_BASE_L     LOONGSON_REG(LOONGSON_REGBASE + 0x40)
0222 #define LOONGSON_MEM_WIN_BASE_H     LOONGSON_REG(LOONGSON_REGBASE + 0x44)
0223 #define LOONGSON_MEM_WIN_MASK_L     LOONGSON_REG(LOONGSON_REGBASE + 0x48)
0224 #define LOONGSON_MEM_WIN_MASK_H     LOONGSON_REG(LOONGSON_REGBASE + 0x4c)
0225
0226 /* PCI_Hit*_Sel_* */
0227
0228 #define LOONGSON_PCI_HIT0_SEL_L     LOONGSON_REG(LOONGSON_REGBASE + 0x50)
0229 #define LOONGSON_PCI_HIT0_SEL_H     LOONGSON_REG(LOONGSON_REGBASE + 0x54)
0230 #define LOONGSON_PCI_HIT1_SEL_L     LOONGSON_REG(LOONGSON_REGBASE + 0x58)
0231 #define LOONGSON_PCI_HIT1_SEL_H     LOONGSON_REG(LOONGSON_REGBASE + 0x5c)
0232 #define LOONGSON_PCI_HIT2_SEL_L     LOONGSON_REG(LOONGSON_REGBASE + 0x60)
0233 #define LOONGSON_PCI_HIT2_SEL_H     LOONGSON_REG(LOONGSON_REGBASE + 0x64)
0234
0235 /* PXArb Config & Status */
0236
0237 #define LOONGSON_PXARB_CFG      LOONGSON_REG(LOONGSON_REGBASE + 0x68)
0238 #define LOONGSON_PXARB_STATUS       LOONGSON_REG(LOONGSON_REGBASE + 0x6c)
0239
0240 #define MAX_PACKAGES 4
0241
0242 /* Chip Config registor of each physical cpu package, PRid >= Loongson-2F */
0243 extern u64 loongson_chipcfg[MAX_PACKAGES];
0244 #define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id]))
0245
0246 /* Chip Temperature registor of each physical cpu package, PRid >= Loongson-3A */
0247 extern u64 loongson_chiptemp[MAX_PACKAGES];
0248 #define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id]))
0249
0250 /* Freq Control register of each physical cpu package, PRid >= Loongson-3B */
0251 extern u64 loongson_freqctrl[MAX_PACKAGES];
0252 #define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id]))
0253
0254 /* pcimap */
0255
0256 #define LOONGSON_PCIMAP_PCIMAP_LO0  0x0000003f
0257 #define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT    0
0258 #define LOONGSON_PCIMAP_PCIMAP_LO1  0x00000fc0
0259 #define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT    6
0260 #define LOONGSON_PCIMAP_PCIMAP_LO2  0x0003f000
0261 #define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT    12
0262 #define LOONGSON_PCIMAP_PCIMAP_2    0x00040000
0263 #define LOONGSON_PCIMAP_WIN(WIN, ADDR)  \
0264     ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
0265
0266 #endif /* __ASM_MACH_LOONGSON64_LOONGSON_H */