asm/mach-loongson64/kernel-entry-init.h

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 2005 Embedded Alley Solutions, Inc
0007  * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
0008  * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)
0009  * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)
0010  */
0011 #ifndef __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
0012 #define __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
0013
0014 #include <asm/cpu.h>
0015
0016 /*
0017  * Override macros used in arch/mips/kernel/head.S.
0018  */
0019     .macro  kernel_entry_setup
0020     .set    push
0021     .set    mips64
0022     /* Set ELPA on LOONGSON3 pagegrain */
0023     mfc0    t0, CP0_PAGEGRAIN
0024     or  t0, (0x1 << 29)
0025     mtc0    t0, CP0_PAGEGRAIN
0026     /* Enable STFill Buffer */
0027     mfc0    t0, CP0_PRID
0028     /* Loongson-3A R4+ */
0029     andi    t1, t0, PRID_IMP_MASK
0030     li  t2, PRID_IMP_LOONGSON_64G
0031     beq     t1, t2, 1f
0032     nop
0033     /* Loongson-3A R2/R3 */
0034     andi    t0, (PRID_IMP_MASK | PRID_REV_MASK)
0035     slti    t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
0036     bnez    t0, 2f
0037     nop
0038 1:
0039     mfc0    t0, CP0_CONFIG6
0040     or  t0, 0x100
0041     mtc0    t0, CP0_CONFIG6
0042 2:
0043     _ehb
0044     .set    pop
0045     .endm
0046
0047 /*
0048  * Do SMP slave processor setup.
0049  */
0050     .macro  smp_slave_setup
0051     .set    push
0052     .set    mips64
0053     /* Set ELPA on LOONGSON3 pagegrain */
0054     mfc0    t0, CP0_PAGEGRAIN
0055     or  t0, (0x1 << 29)
0056     mtc0    t0, CP0_PAGEGRAIN
0057     /* Enable STFill Buffer */
0058     mfc0    t0, CP0_PRID
0059     /* Loongson-3A R4+ */
0060     andi    t1, t0, PRID_IMP_MASK
0061     li  t2, PRID_IMP_LOONGSON_64G
0062     beq     t1, t2, 1f
0063     nop
0064     /* Loongson-3A R2/R3 */
0065     andi    t0, (PRID_IMP_MASK | PRID_REV_MASK)
0066     slti    t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
0067     bnez    t0, 2f
0068     nop
0069 1:
0070     mfc0    t0, CP0_CONFIG6
0071     or  t0, 0x100
0072     mtc0    t0, CP0_CONFIG6
0073 2:
0074     _ehb
0075     .set    pop
0076     .endm
0077
0078 #define USE_KEXEC_SMP_WAIT_FINAL
0079     .macro  kexec_smp_wait_final
0080     /* s0:prid s1:initfn */
0081     /* a0:base t1:cpuid t2:node t9:count */
0082     mfc0        t1, CP0_EBASE
0083     andi        t1, MIPS_EBASE_CPUNUM
0084     dins        a0, t1, 8, 2       /* insert core id*/
0085     dext        t2, t1, 2, 2
0086     dins        a0, t2, 44, 2      /* insert node id */
0087     mfc0        s0, CP0_PRID
0088     andi        s0, s0, (PRID_IMP_MASK | PRID_REV_MASK)
0089     beq     s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R1), 1f
0090     beq     s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R2), 1f
0091     b       2f                 /* Loongson-3A1000/3A2000/3A3000/3A4000 */
0092 1:  dins        a0, t2, 14, 2      /* Loongson-3B1000/3B1500 need bit 15~14 */
0093 2:  li      t9, 0x100          /* wait for init loop */
0094 3:  addiu       t9, -1             /* limit mailbox access */
0095     bnez        t9, 3b
0096     lw      s1, 0x20(a0)       /* check PC as an indicator */
0097     beqz        s1, 2b
0098     ld      s1, 0x20(a0)       /* get PC via mailbox reg0 */
0099     ld      sp, 0x28(a0)       /* get SP via mailbox reg1 */
0100     ld      gp, 0x30(a0)       /* get GP via mailbox reg2 */
0101     ld      a1, 0x38(a0)
0102     jr      s1                 /* jump to initial PC */
0103     .endm
0104
0105 #endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */