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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __ASM_MACH_LOONGSON64_IRQ_H_
0003 #define __ASM_MACH_LOONGSON64_IRQ_H_
0004 
0005 /* cpu core interrupt numbers */
0006 #define NR_IRQS_LEGACY      16
0007 #define NR_MIPS_CPU_IRQS    8
0008 #define NR_MAX_CHAINED_IRQS 40 /* Chained IRQs means those not directly used by devices */
0009 #define NR_IRQS         (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + NR_MAX_CHAINED_IRQS + 256)
0010 #define MAX_IO_PICS     1
0011 #define MIPS_CPU_IRQ_BASE   NR_IRQS_LEGACY
0012 #define GSI_MIN_CPU_IRQ     0
0013 
0014 #include <asm/mach-generic/irq.h>
0015 
0016 #endif /* __ASM_MACH_LOONGSON64_IRQ_H_ */