asm/mach-loongson64/cpucfg-emul.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_
0003 #define _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_
0004
0005 #include <asm/cpu-info.h>
0006
0007 #ifdef CONFIG_CPU_LOONGSON3_CPUCFG_EMULATION
0008
0009 #include <loongson_regs.h>
0010
0011 #define LOONGSON_FPREV_MASK 0x7
0012
0013 void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c);
0014
0015 static inline bool loongson3_cpucfg_emulation_enabled(struct cpuinfo_mips *c)
0016 {
0017     /* All supported cores have non-zero LOONGSON_CFG1 data. */
0018     return c->loongson3_cpucfg_data[0] != 0;
0019 }
0020
0021 static inline u32 loongson3_cpucfg_read_synthesized(struct cpuinfo_mips *c,
0022     __u64 sel)
0023 {
0024     switch (sel) {
0025     case LOONGSON_CFG0:
0026         return c->processor_id;
0027     case LOONGSON_CFG1:
0028     case LOONGSON_CFG2:
0029     case LOONGSON_CFG3:
0030         return c->loongson3_cpucfg_data[sel - 1];
0031     case LOONGSON_CFG4:
0032     case LOONGSON_CFG5:
0033         /* CPUCFG selects 4 and 5 are related to the input clock
0034          * signal.
0035          *
0036          * Unimplemented for now.
0037          */
0038         return 0;
0039     case LOONGSON_CFG6:
0040         /* CPUCFG select 6 is for the undocumented Safe Extension. */
0041         return 0;
0042     case LOONGSON_CFG7:
0043         /* CPUCFG select 7 is for the virtualization extension.
0044          * We don't know if the two currently known features are
0045          * supported on older cores according to the public
0046          * documentation, so leave this at zero.
0047          */
0048         return 0;
0049     }
0050
0051     /*
0052      * Return 0 for unrecognized CPUCFG selects, which is real hardware
0053      * behavior observed on Loongson 3A R4.
0054      */
0055     return 0;
0056 }
0057 #else
0058 static inline void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c)
0059 {
0060 }
0061
0062 static inline bool loongson3_cpucfg_emulation_enabled(struct cpuinfo_mips *c)
0063 {
0064     return false;
0065 }
0066
0067 static inline u32 loongson3_cpucfg_read_synthesized(struct cpuinfo_mips *c,
0068     __u64 sel)
0069 {
0070     return 0;
0071 }
0072 #endif
0073
0074 #endif /* _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_ */